TA1370FG, TA1372FNG, TA1374FLG Selling Leads, Datasheet
MFG:TA Package Cooled:SSOP30 D/C:08+/09+
TA1370FG, TA1372FNG, TA1374FLG Datasheet download
Part Number: TA1370FG
MFG: TA
Package Cooled: SSOP30
D/C: 08+/09+
TA1370FG, TA1372FNG, TA1374FLG
- Table of contents:
Info of TA1370FG
Info of TA1372FNG
Info of TA1374FLG
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About TA1370FG
PDF/DataSheet Download
Datasheet: TA1370FG
File Size: 653028 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
About TA1.0
PDF/DataSheet Download
Datasheet: TA1.0
File Size: 78848 KB
Manufacturer: CLARE [Clare, Inc.]
Download : Click here to Download
About TA1.0
PDF/DataSheet Download
Datasheet: TA1.0
File Size: 78848 KB
Manufacturer: CLARE [Clare, Inc.]
Download : Click here to Download
TA1370FG General Description
TA1370FG is a sync processor for TV component signals.
TA1370FG provides sync and frequency counter processing for external input signals.
These functions are integrated in a 30 pin SSOP-type plastic package.
TA1370FG provides I2C bus interface, so various functions and controls are adjustable via the bus.
TA1370FG provides sync and frequency counter processing for external input signals.
These functions are integrated in a 30 pin SSOP-type plastic package.
TA1370FG provides I2C bus interface, so various functions and controls are adjustable via the bus.
TA1370FG Maximum Ratings
|
Characteristics |
Symbol |
Rating |
Unit |
| Supply voltage |
VCCmax |
12 |
V |
| Input pin signal voltage |
einmax |
9 |
VP-P |
| Power dissipation |
PD(Note1) |
1136 |
mW |
| Power dissipation reduction rate |
1/ja |
9.1 |
mW/ |
| Operating temperature |
Topr |
20 to 75 |
|
| Storage temperature |
Tstg |
55 to 150 |
TA1370FG Features
• Horizontal synchronization circuit (28.125 kHz, 31.5 kHz, 33.75 kHz, 45 kHz)
• Vertical synchronization circuit (525P, 625P, 750P, 1125I, PAL 100 Hz, NTSC 120 Hz)
• Horizontal and vertical frequency counter
• Horizontal PLL
• Accepts 2-level and 3-level sync
• Accepts both negative and positive HD and VD
• Clamp pulse output
• HD, VD output (polarity inverter)
• Separated sync output
• Mask for the copy guard signal
• Vertical synchronization circuit (525P, 625P, 750P, 1125I, PAL 100 Hz, NTSC 120 Hz)
• Horizontal and vertical frequency counter
• Horizontal PLL
• Accepts 2-level and 3-level sync
• Accepts both negative and positive HD and VD
• Clamp pulse output
• HD, VD output (polarity inverter)
• Separated sync output
• Mask for the copy guard signal
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