SST89C54, SST89C54-33-C, SST89C5433-C-NJ Selling Leads, Datasheet
MFG:SST Package Cooled:DIP-40 D/C:08+
SST89C54, SST89C54-33-C, SST89C5433-C-NJ Datasheet download
Part Number: SST89C54
MFG: SST
Package Cooled: DIP-40
D/C: 08+
MFG:SST Package Cooled:DIP-40 D/C:08+
SST89C54, SST89C54-33-C, SST89C5433-C-NJ Datasheet download
MFG: SST
Package Cooled: DIP-40
D/C: 08+
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Datasheet: SST89C54
File Size: 376518 KB
Manufacturer: SST
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PDF/DataSheet Download
Datasheet: SST89C54-33-C-NI
File Size: 423551 KB
Manufacturer: SST [Silicon Storage Technology, Inc]
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PDF/DataSheet Download
Datasheet: SST
File Size: 83114 KB
Manufacturer:
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SST89C54 and SST89C58 are members of the FlashFlex51 family of 8-bit microcontrollers. The FlashFlex51 family is a family of embedded microcontroller products designed and manufactured on the state-of-the-art SuperFlash CMOS semiconductor process technology.As a member of the FlashFlex51 controller family, the SST89C54/58 uses the same powerful instruction set,has the same architecture, and is pin-for-pin compatible with standard 8xC5x microcontroller devices.SST89C54/58 comes with 20/36 KByte of integrated on-chip flash EEPROM program memory using the patented and proprietary Silicon Storage Technology, Inc. (SST) CMOS SuperFlash EEPROM technology with the SST field enhancing tunneling injector split-gate memory cells.
The SuperFlash memory is partitioned into 2 independent program memory blocks. The primary SuperFlash Block 0 occupies 16/32 KByte of internal program memory space and the secondary SuperFlash Block 1 occupies 4 KByte of SST89C54/58's internal program memory space. The 4 KByte secondary SuperFlash block can be mapped to the highest or lowest location of the 64 KByte address space; it can also be hidden from the program counter and used as an independent EEPROM-like data memory. The flash memory blocks can be programmed via a standard 87C5x OTP EPROM programmer fitted with a special adapter and firmware for SST89C54/58 devices. During the power-on reset, the SST89C54/58 can be configured as a master for source code storage or as a slave to an external host for In-Application Programming (IAP) operation. SST89C54/58 is designed to be programmed "In-System" and "In-Application" on the printed circuit board for maximum flexibility.
The device is pre-programmed with a sample bootstrap loader in the memory (see Note 1), demonstrating the initial user program code loading or subsequent user code updating via the "IAP" operation.In addition to 20/36 KByte of SuperFlash EEPROM program memory on-chip, the SST89C54/58 can address up to 64 KByte of program memory external to the chip. The SST89C54/58 have 256 x 8 bits of on-chip RAM. Up to 64 KByte of external data memory (RAM) can be addressed.The highly reliable, patented SuperFlash technology and memory cell architecture have a number of important advantages for designing and manufacturing flash EEPROMs, when compared with other approaches.These advantages translate into significant cost and reliability benefits for our customers.