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The SST39VF800Q/VF800 devices are 512K x 16 CMOS Multi-Purpose Flash (MPF) manufactured with SST's proprietary, high performance CMOS SuperFlash technology. The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST39VF800Q/VF800 write (Program or Erase) with a 2.7-3.6V power supply. The SST39VF800Q/ VF800 conform to JEDEC standard pinouts for x16 memories.
Featuring high performance word program, the SST39VF800Q/VF800 devices provide a typical word program time of 14 µsec. The entire memory can typically be erased and programmed word-by-word in 8 seconds, when using interface features such as Toggle Bit or Data# Polling to indicate the completion of Program operation. To protect against inadvertent write, the SST39VF800Q/VF800 have on-chip hardware and software data protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, the SST39VF800Q/VF800 are offered with a guaranteed endurance of 10,000 cycles. Data retention is rated at greater than 100 years.
The SST39VF800Q/VF800 devices are suited for applications that require convenient and economical updating of program, configuration, or data memory. For all system applications, the SST39VF800Q/VF800 significantly improve performance and reliability, while lowering power consumption. The SST39VF800Q/VF800 inherently use less energy during Erase and Program than alternative flash technologies. The total energy consumed is a function of the applied voltage, current, and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash technologies. The SST39VF800Q/ VF800 also improve flexibility while lowering the cost for program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Program times, independent of the number of Erase/ Program cycles that have occurred. Therefore the system software or hardware does not have to be modified or de-rated as is necessary with alternative flash technologies, whose erase and program times increase with accumulated Erase/Program cycles.
To meet high density, surface mount requirements, the SST39VF800Q/VF800 are offered in 48-pin TSOP and 48-pin TFBGA packages. See Figures 1 and 2 for pinouts.
SST39VF800Q Maximum Ratings
Temperature Under Bias .............................................................................................................. -55°C to +125°C Storage Temperature .................................................................................................................. -65°C to +150°C D. C. Voltage on Any Pin to Ground Potential ................................................................... -0.5V to VDDQ (2) + 0.5V Transient Voltage (<20 ns) on Any Pin to Ground Potential .............................................. -1.0V to VDDQ(2) + 1.0V Voltage on A9 Pin to Ground Potential .............................................................................................. -0.5V to 13.2V Package Power Dissipation Capability (Ta = 25°C) .......................................................................................... 1.0W Surface Mount Lead Soldering Temperature (3 Seconds) ............................................................................... 240°C Output Short Circuit Current(1) ....................................................................................................................... 50 mA
SST39VF800Q Features
• Organized as 512 K X 16 • Single 2.7-3.6V Read and Write Operations • VDDQ Power Supply to Support 5V I/O for SST39VF800Q - VDDQ not available on SST39VF800 • Superior Reliability - Endurance: 100,000 Cycles (typical) - Greater than 100 years Data Retention • Low Power Consumption: - Active Current: 15 mA (typical) - Standby Current: 3 µA (typical) - Auto Low Power Mode: 3 µA (typical) • Small Sector Erase Capability (256 sectors) - Uniform 2 KWord sectors • Block Erase Capability (16 blocks) - Uniform 32 KWord blocks • Fast Read Access Time: - 70 and 90 ns • Latched Address and Data • Fast Sector Erase and Word Program: - Sector Erase Time: 18 ms (typical) - Block Erase Time: 18 ms (typical) - Chip Erase Time: 70 ms (typical) - Word Program time: 14 µs (typical) - Chip Rewrite Time: 8 seconds (typical) • Automatic Write Timing - Internal VPP Generation • End of Write Detection - Toggle Bit - Data# Polling • CMOS I/O Compatibility • JEDEC Standard - Flash EEPROM Pinouts and command sets • Packages Available - 48-Pin TSOP (12mm x 20mm) - 6 x 8 Ball TFBGA