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SN54AC574BCAJC, SN54AC574J, SN54AC86

Table of contents:
Info of SN54AC574BCAJC
Info of SN54AC574J
Info of SN54AC86

SN54AC574BCAJC, SN54AC574J, SN54AC86 Selling Leads, Datasheet

MFG:TEXAS Package Cooled:DIP D/C:09+

SN54AC574BCAJC, SN54AC574J, SN54AC86 Picture

SN54AC574BCAJC, SN54AC574J, SN54AC86 Datasheet download

Five Points

Part Number: SN54AC574BCAJC

MFG: TEXAS

Package Cooled: DIP

D/C: 09+

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SN54AC86 General Description

The 'AC86 are quadruple 2-input exclusive-OR gates. The devices perform the Boolean function Y = A B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of
the inputs is high, the signal on the other input is reproduced inverted at the output.

The SN54AC86 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74AC86 is characterized for operation from 40°C to 85°C.

SN54AC86 Maximum Ratings

Supply voltage range, V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, V_I(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V_CC + 0.5 V
Output voltage range, V_O(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I< 0 or V_I> V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . ±20 mA
Output clamp current, I_OK(V_O < 0 or V_O > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . ±20 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . .. ±50 mA
Continuous current through V_CCor GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .. . ±200 mA
Maximum power dissipation at T_A= 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . 1.25 W
                                                                                                           DB package . . . . . . . . . . . . . .. . . 0.5 W
                                                                                                           N package . . . . . . . . . . . . . . .. . . 1.1 W
                                                                                                          PW package . . . . . . . . . . . . . . . . 0.5 W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150C and a board trace length of 750 mils, except for the N package, which has a trace length of zero.

SN54AC86 Features

· EPIC^TM (Enhanced-Performance Implanted CMOS) 1-mm Process
· Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic (N) and Ceramic (J) DIPs

SN54AC86 Connection Diagram

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