SAB82526, SAB-82526, SAB82526 NVA3 Selling Leads, Datasheet
MFG:PHILIPS Package Cooled:300 D/C:PLCC
SAB82526, SAB-82526, SAB82526 NVA3 Datasheet download
Part Number: SAB82526
MFG: PHILIPS
Package Cooled: 300
D/C: PLCC
SAB82526, SAB-82526, SAB82526 NVA3
- Table of contents:
Info of SAB82526
Info of SAB-82526
Info of SAB82526 NVA3
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About SAB82526
PDF/DataSheet Download
Datasheet: SAB82526
File Size: 747759 KB
Manufacturer: INFINEON [Infineon Technologies AG]
Download : Click here to Download
About SAB0529
PDF/DataSheet Download
Datasheet: SAB0529
File Size: 530031 KB
Manufacturer: SIEMENS [Siemens Semiconductor Group]
Download : Click here to Download
About SAB0529
PDF/DataSheet Download
Datasheet: SAB0529
File Size: 530031 KB
Manufacturer: SIEMENS [Siemens Semiconductor Group]
Download : Click here to Download
SAB82526 Maximum Ratings
|
Parameter |
Symbol |
Limit Values |
Unit |
| Ambient temperature under bias: SAB SAF |
TA TA |
0 to 70 40 to 85 |
°C °C |
| Storage temperature |
Tstg |
65 to 125 |
°C |
| Voltage on any pin with respect to ground |
VS |
0.4 to VDD + 0.4 |
V |
| Maximum voltage on any pin |
Vmax |
6 |
V |
SAB82526 Features
Serial Interface
`Two independent full-duplex HDLC channels (SAB 82526: one channel)
- On chip clock generation or external clock source
- On chip DPLL for clock recovery for each channel
- Two independent baudrate generators (SAB 82526: one baudrate generator)
- Independent time-slot assignment for each channel with programmable time-slot length (1-256 bit)
`Different modes of data encoding
`Modem control lines (RTS, CTS, CD)
`Support of bus configuration by collision resolution
`Programmable bit inversion
`Transparent receive/transmit of data bytes without HDLC framing
`Continuous transmission of 1 to 32 bytes possible
`Data rate up to 4 Mbit/s
Protocol Support
`Various types of protocol support depending on operating mode
- Auto-mode
- Non-auto mode
- Transparent mode
`Handling of bit oriented functions in all modes
`Support of LAPB/LAPD/SDLC/HDLC protocol in auto-mode (I- and S-frame handling)
`Modulo 8 or modulo 128 operation
`Programmable time-out and retry conditions
`Programmable maximum packet size checking
P Interface
`64 byte FIFO's per channel and direction
`Storage capacity of up to 17 short frames in receive direction
`Efficient transfer of data blocks from/to system memory by DMA or interrupt request
`8-bit demultiplexed or multiplexed bus interface
`Intel or Motorola type P interface
`Two independent full-duplex HDLC channels (SAB 82526: one channel)
- On chip clock generation or external clock source
- On chip DPLL for clock recovery for each channel
- Two independent baudrate generators (SAB 82526: one baudrate generator)
- Independent time-slot assignment for each channel with programmable time-slot length (1-256 bit)
`Different modes of data encoding
`Modem control lines (RTS, CTS, CD)
`Support of bus configuration by collision resolution
`Programmable bit inversion
`Transparent receive/transmit of data bytes without HDLC framing
`Continuous transmission of 1 to 32 bytes possible
`Data rate up to 4 Mbit/s
Protocol Support
`Various types of protocol support depending on operating mode
- Auto-mode
- Non-auto mode
- Transparent mode
`Handling of bit oriented functions in all modes
`Support of LAPB/LAPD/SDLC/HDLC protocol in auto-mode (I- and S-frame handling)
`Modulo 8 or modulo 128 operation
`Programmable time-out and retry conditions
`Programmable maximum packet size checking
P Interface
`64 byte FIFO's per channel and direction
`Storage capacity of up to 17 short frames in receive direction
`Efficient transfer of data blocks from/to system memory by DMA or interrupt request
`8-bit demultiplexed or multiplexed bus interface
`Intel or Motorola type P interface
SAB82526 Connection Diagram
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