RTL81008, RTL8100B(L), RTL8100B(L) LQFP 100PIN Selling Leads, Datasheet
MFG:REALTEK Package Cooled:QFP D/C:03
RTL81008, RTL8100B(L), RTL8100B(L) LQFP 100PIN Datasheet download
Part Number: RTL81008
MFG: REALTEK
Package Cooled: QFP
D/C: 03
MFG:REALTEK Package Cooled:QFP D/C:03
RTL81008, RTL8100B(L), RTL8100B(L) LQFP 100PIN Datasheet download
MFG: REALTEK
Package Cooled: QFP
D/C: 03
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PDF/DataSheet Download
Datasheet: RTL035N03
File Size: 82850 KB
Manufacturer: ROHM
Download : Click here to Download
PDF/DataSheet Download
Datasheet: RTL8100B(L)
File Size: 631358 KB
Manufacturer:
Download : Click here to Download
PDF/DataSheet Download
Datasheet: RTL035N03
File Size: 82850 KB
Manufacturer: ROHM
Download : Click here to Download
The Realtek RTL8100B(L) is a highly integrated, cost-effective single-chip Fast Ethernet controller that provides 32-bit performance, PCI bus master capability, and full compliance with IEEE 802.3u 100Base-T specifications and IEEE 802.3x Full Duplex Flow Control. It also supports the Advanced Configuration Power management Interface (ACPI), PCI power management for modern operating systems that are capable of Operating System Directed Power Management (OSPM) to achieve the most efficient power management possible. The RTL8100B(L) does not support CardBus mode as the RTL8139C does.
In addition to the ACPI feature, the RTL8100B(L) also supports remote wake-up (including AMD Magic Packet, LinkChg, and Microsoft® wake-up frame) in both ACPI and APM environments. The RTL8100B(L) is capable of performing an internal reset through the application of auxiliary power. When auxiliary power is applied and the main power remains off, the RTL8100B(L) is ready and waiting for the Magic Packet or Link Change to wake the system up. Also, the LWAKE pin provides 4 different output signals including active high, active low, positive pulse, and negative pulse. The versatility of the RTL8100B(L) LWAKE
pin provides motherboards with Wake-On-LAN (WOL) functionality.
The RTL8100B(L) also supports Analog Auto-Power-down, that is, the analog part of the RTL8100B(L) can be shut down temporarily according to user requirements or when the RTL8100B(L) is in a power down state with the wakeup function disabled. In addition, when the analog part is shut down and the IsolateB pin is low (i.e. the main power is off), then both the analog and digital parts stop functioning and the power consumption of the RTL8100B(L) will be negligible. The RTL8100B(L) also supports an auxiliary power auto-detect function, and will auto-configure related bits of their own PCI power management
registers in PCI configuration space.
The PCI Vital Product Data(VPD) is also supported to provide the information that uniquely identifies hardware (i.e., the OEM brand name of RTL8100B(L) LAN card). The information may consist of part number, serial number, and other detailed information.
To provide cost down support, the RTL8100B(L) is capable of using a 25MHz crystal or OSC as its internal clock source.
The RTL8100B(L) keeps network maintenance costs low and eliminates usage barriers. It is the easiest way to upgrade a
network from 10 to 100Mbps. It also supports full-duplex operation, making 200Mbps bandwidth possible at no additional cost.
To improve compatibility with other brands' products, the RTL8100B(L) is also capable of receiving packets with
InterFrameGap no less than 40 Bit-Time. The RTL8100B(L) is highly integrated and requires no "glue" logic or external
memory.
·100 pin QFP/LQFP
·Integrated Fast Ethernet MAC, Physical chip and transceiver in one chip
·10 Mb/s and 100 Mb/s operation
·Supports 10 Mb/s and 100 Mb/s N-way Auto-negotiation operation
·PCI local bus single-chip Fast Ethernet controller
·Compliant to PCI Revision 2.2
·Supports PCI clock 16.75MHz-40MHz
·Supports PCI target fast back-to-back transaction
·Provides PCI bus master data transfers and PCI
memory space or I/O space mapped data transfers
of RTL8100B(L)'s operational registers
·Supports PCI VPD (Vital Product Data)
·Supports ACPI, PCI power management
·Supports 25MHz crystal or 25MHz OSC as the internal
clock source. The frequency deviation of either crystal or
OSC must be within 50 PPM.
·Compliant to PC99/PC2001 standard
·Supports Wake-On-LAN function and remote wake-up
(Magic Packet*, LinkChg and Microsoft® wake-up frame)
·Supports 4 Wake-On-LAN (WOL) signals (active high,
active low, positive pulse, and negative pulse)
·Supports auxiliary power-on internal reset, to be ready
for remote wake-up when main power still remains off
·Supports auxiliary power auto-detect, and sets the
related capability of power management registers in PCI configuration space.
·Includes a programmable, PCI burst size and early Tx/Rx threshold.
·Supports a 32-bit general-purpose timer with the
external PCI clock as clock source, to generate timer-interrupt
·Contains two large (2Kbyte) independent receive and transmit FIFOs
·Advanced power saving mode when LAN function or wakeup function is not used
·Uses 93C46 (64*16-bit EEPROM) to store resource configuration, ID parameter, and VPD data.
·Supports LED pins for various network activity
·Supports loopback capability
·Half/Full duplex capability
·Supports Full Duplex Flow Control (IEEE 802.3x)
·2.5/3.3V power supply with 5V tolerant I/Os.
·0.25u CMOS process
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