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PC8741VCG, PC8741V-VPC, PC87427

Table of contents:
Info of PC8741VCG
Info of PC8741V-VPC
Info of PC87427

PC8741VCG, PC8741V-VPC, PC87427 Selling Leads, Datasheet

MFG:N/A Package Cooled:QFP D/C:N/A

PC8741VCG, PC8741V-VPC, PC87427 Datasheet download

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Part Number: PC8741VCG

MFG: N/A

Package Cooled: QFP

D/C: N/A

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PC87427 General Description

The National Semiconductor PC87427 is targeted for a wide range of servers, workstations and high-end desktops that use the Low Pin Count (LPC) bus for the host interface and an SMBus® interface for either a Baseboard Management Controller (BMC) or mini-BMC (mBMC), both of which are optional.

For LPC and SMBus access, the PC87427 features a fast X-Bus, over which boot flash and I/O devices can be accessed. The PC87427 supports X-Bus address line forcing (to 0 or 1) to create memory windows for BIOS data storage. When VSB exists, the BMC or mBMC can access the PC87427 and its fast X-Bus via SMBus. The SMBus also controls serial port float, RTC access, and serial port interconnection (snoop and take-over modes). In addition, the PC87427 provides routing of up to two selected LPC I/O port transactions to the GPIO Extension Port.

The PC87427 provides a VSB-powered high-frequency clock for on-chip peripherals; it also provides a configurable highfrequency clock for other VSB-powered platform components. The PC87427 supports SensorPath health monitor interface to LMPCxx sensors, fan monitoring and control, and a chassis intrusion detector. The System Wake-Up Control (SWC) module supports flexible wake-up and power-off request mechanisms for all platforms (i.e., with or without BMC/mBMC).

The PC87427 supports both I/O and memory mapping of module registers and enables building legacy-free systems.

The PC87427 also incorporates a Floppy Disk Controller (FDC), two serial ports (UARTs), a Keyboard and Mouse Controller (KBC), General-Purpose Input/Output (GPIO), GPIO extension for additional off-chip GPIO ports, and an interrupt serializer for parallel IRQs.

PC87427 Maximum Ratings

Symbol	Paramete	Conditions	Min	Max	Unit
V_SUP	Supply Voltage¹		-0.5	+4.1	V
V_I	Input Voltage	All other pins	-0.5	5.5	V
V_I	Input Voltage	PCI_CLK, LAD3-0, LFRAME, PCI_RESET, SERIRQ, LPCPD	-0.5	V_DD + 0.5	V
V_O	Output Voltage	All other pins	-0.5	5.5	V
V_O	Output Voltage	LAD3-0, LDRQ, SERIRQ	-0.5	V_DD + 0.5	V
T_STG	Storage Temperature		-65	+165	°C
P_D	Power Dissipation			1	W
T_L	Lead Temperature Soldering (10 s)			+260	°C
	ESD Tolerance	C_ZAP= 100 pF R_ZAP = 1.5 K²	2000		V
M_CRS	Battery Maximum Safe Reverse Current	VSB = 3.63V RUL3=1.6K	2.27⁴		mA

1. VSUP is VDD, VSB or VBAT.
2. Value based on test complying with RAI-5-048-RA human body model ESD testing.
3. Minimum value of internal protection resistor.
4. For batteries with lower MCRS it is necessary to connect a series resistor between the battery and VBAT pin, with resistance: R=(3.63V/MCRS)-1.6 K.

PC87427 Features

· Legacy-reduced Advanced I/O, optimized for high-end platforms. Legacy modules: FDC, two Serial Ports (UARTs) and a Keyboard and Mouse Controller (KBC).
· SensorPath system health support for LMXX sensors, fan monitor/control, and chassis intrusion detection, for all platforms (i.e., with or without a BMC or mBMC).
· 8/16-bit fast X-Bus extension for boot flash, memory and I/O.
· I/O-mapped and memory-mapped registers.
· VSB-powered SMBus access to modules and fast X-Bus.
· Two sets of BIOS code and data support, for main and back-up BIOS.
· Extremely low current consumption in Battery Backup mode.
· Serial Interface for manageability (Serial Interface M). Two-to-one multiplexing of Serial Ports 1 and 2.
· 52 GPIO ports with a variety of wake-up events, plus GPIO extension for additional off-chip GPIO ports.
· Watchdog for autonomous system recovery for BIOS Boot process and for operating system use.
· 128-pin PQFP package.

PC87427 Connection Diagram

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