NCP5203, NCP5203MN, NCP5203MNR2 Selling Leads, Datasheet
MFG:ON Package Cooled:QFN-18 D/C:09+
NCP5203, NCP5203MN, NCP5203MNR2 Datasheet download
Part Number: NCP5203
MFG: ON
Package Cooled: QFN-18
D/C: 09+
NCP5203, NCP5203MN, NCP5203MNR2
- Table of contents:
Info of NCP5203
Info of NCP5203MN
Info of NCP5203MNR2
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About NCP5203
PDF/DataSheet Download
Datasheet: NCP5203
File Size: 244886 KB
Manufacturer: ON SEMICONDUCTOR
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About NCP5203MNR2G
PDF/DataSheet Download
Datasheet: NCP5203MNR2G
File Size: 77426 KB
Manufacturer: ONSEMI [ON Semiconductor]
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About NCP5203MNR2G
PDF/DataSheet Download
Datasheet: NCP5203MNR2G
File Size: 77426 KB
Manufacturer: ONSEMI [ON Semiconductor]
Download : Click here to Download
NCP5203 General Description
The NCP5203 2−in−1 DDR Power Controller is a complete power solution for an ACPI compliant high current DDR memory system. This IC combines the efficiency of a PWM controller for the VDDQ supply with the simplicity of linear regulator for the VTT termination voltage. The NCP5203 contains a synchronous PWM buck controller for driving two external NFETs to form the DDR memory supply voltage (VDDQ). The ±2.0 A user adjustable VTT terminator regulator has short circuit protection. An internal power good function monitors both the VDDQ and VTT outputs and signals if a fault occurs. Protective features include soft−start, undervoltage monitoring of 5VDUAL, over protection current (OCP), and thermal shutdown. The IC is packaged in 18−lead QFN.
NCP5203 Maximum Ratings
| Rating | Symbol | Value | Unit |
| Power Supply Voltage (Pin 12, 18) | 5VDUAL | −0.3, 6.5 | V |
| Gate Drive Supply/Output Voltage (Pin 13, 14, 15) | VBST, Vg | −0.3, 14 | V |
| Switch DDQ (Pin 11) | SWDDQ | −1.0, 5VDUAL | V |
| Input/Output Pins (Pin 1, 2, 7; 4, 5, 17; 3, 8, 9, 10) | VIO | −0.3, 6.5 | V |
| Thermal Characteristics QFN−18 Plastic Package Thermal Resistance Junction−to−Ambient |
RJA | 35 | °C/W |
| Operating Junction Temperature Range | TJ | 0 to +150 | °C |
| Operating Ambient Temperature Range | TA | 0 to +70 | °C |
| Storage Temperature Range | Tstg | −55 to +150 | °C |
| Moisture Sensitivity Level | MSL | 2.0 | − |
| Electro Static Discharge (ESD) Human Body Model Machine Model |
HBM MM |
2.0 200 |
kV V |
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. All voltages are with respect to AGND (Pin 6) and PGND (Pin 16).
NCP5203 Features
• Supports DDR I and DDR II
• Incorporates VDDQ, VTT Regulators
• Operates from Single 5 V Supply
• VTT Regulator includes Integrated Power FETs Sourcing/Sinking up to 2.0 A
• All External Power MOSFETs are N−Channel
• Adjustable VDDQ
• Adjustable VTT
• Fixed Switching Frequency of 300 kHz for VDDQ in S0
• Fixed Switching Frequency of 600 kHz for VDDQ in S3
• Soft−Start Protection for VDDQ
• Undervoltage Monitor of 5VDUAL
• Short−Circuit Protection for VDDQ and VTT
• Thermal Shutdown
• Housed in QFN−18
• Pb−Free Package is Available*
• Incorporates VDDQ, VTT Regulators
• Operates from Single 5 V Supply
• VTT Regulator includes Integrated Power FETs Sourcing/Sinking up to 2.0 A
• All External Power MOSFETs are N−Channel
• Adjustable VDDQ
• Adjustable VTT
• Fixed Switching Frequency of 300 kHz for VDDQ in S0
• Fixed Switching Frequency of 600 kHz for VDDQ in S3
• Soft−Start Protection for VDDQ
• Undervoltage Monitor of 5VDUAL
• Short−Circuit Protection for VDDQ and VTT
• Thermal Shutdown
• Housed in QFN−18
• Pb−Free Package is Available*
NCP5203 Typical Application
• DDR Memory Supply and Termination Voltage
• Active Termination Busses (SSTL−2, SSTL−3)
• Active Termination Busses (SSTL−2, SSTL−3)
NCP5203 Connection Diagram
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