MP7541TD/883, MP7541TQ, MP7542 Selling Leads, Datasheet
MFG:MP Package Cooled:SOP D/C:08+09+
MP7541TD/883, MP7541TQ, MP7542 Datasheet download
Part Number: MP7541TD/883
MFG: MP
Package Cooled: SOP
D/C: 08+09+
MFG:MP Package Cooled:SOP D/C:08+09+
MP7541TD/883, MP7541TQ, MP7542 Datasheet download
MFG: MP
Package Cooled: SOP
D/C: 08+09+
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PDF/DataSheet Download
Datasheet: MP7001
File Size: 155175 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MP7001
File Size: 155175 KB
Manufacturer: TOSHIBA [Toshiba Semiconductor]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MP7542
File Size: 111318 KB
Manufacturer: EXAR [Exar Corporation]
Download : Click here to Download
The MP7542 is a precision, 12-bit CMOS 4-quadrant multiplying Digital-to-Analog Converter designed for direct interface to 4 and 8-bit microprocessors.
The MP7542 consists of three 4-bit registers, a 12-bit DAC register, address decoding logic, and a 12-bit CMOS multiplying DAC. Data is loaded into the data registers in three 4-bit nibbles and subsequently transferred to the 12-bit DAC register. All data loading or data transfer operations are identical to the WRITE cycle of a static RAM. A CLEAR input allows the 12-bit DAC register to be reset to all zeros.
The MP7542 is manufactured using advanced thin-film on monolithic double metal CMOS fabrication process. A unique decoding technique is utilized yielding excellent accuracy and stability.
The MP7542 reduces the additional linearity errors due to output amplifier offset to only 330mV per millivolt of offset versus 670 mV for the standard R-2R ladder CMOS DACs.
VDD to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
Digital Input Voltage to .GND (2) GND . . . . . . . 0.5 to VDD +0.5 V
IOUT1, IOUT2 to GND . . . . . . . . . . . . . . . . GND 0.5 to VDD +0.5 V
VREF to GND (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+25 V
VRFB to GND (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±25 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±1 V
(Functionality Guaranteed ±0.5 V)
Storage Temperature . . . . . . . . . . . . . . . . . . . 65°C to +150°C
Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . . +300°C
Package Power Dissipation Rating to 75°C
CDIP, PDIP, SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .700mW
Derates above . . . . . . . . . . . . . . . . . . . . . . . . . . .75°C 10mW/°C
NOTES:
1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies.
3 GND refers to AGND and DGND.