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MC9S12KT256VPVE, MC9S12NE6, MC9S12NE64

Table of contents:
Info of MC9S12KT256VPVE
Info of MC9S12NE6
Info of MC9S12NE64

MC9S12KT256VPVE, MC9S12NE6, MC9S12NE64 Selling Leads, Datasheet

MFG:Freescale Semiconductor Category:Integrated Circuits (ICs) Package Cooled:LQFP112 D/C:07+

MC9S12KT256VPVE, MC9S12NE6, MC9S12NE64 Picture

MC9S12KT256VPVE, MC9S12NE6, MC9S12NE64 Datasheet download

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Part Number: MC9S12KT256VPVE

Category: Integrated Circuits (ICs)

MFG: Freescale Semiconductor

Package Cooled: LQFP112

D/C: 07+

Description: IC MCU 256K FLASH 25MHZ 112-LQFP

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MC9S12KT256VPVE Parameters

Technical/Catalog Information	MC9S12KT256VPVE
Vendor	Freescale Semiconductor
Category	Integrated Circuits (ICs)
Program Memory Size	256KB (256K x 8)
RAM Size	12K x 8
Number of I /O	91
Package / Case	112-LQFP
Speed	25MHz
Controller Series	HCS12
Oscillator Type	Internal
Packaging	Tray
Program Memory Type	FLASH
EEPROM Size	4K x 8
Core Processor	HCS12
Data Converters	A/D 8x10b
Core Size	16-Bit
Operating Temperature	-40°C ~ 105°C
Connectivity	CAN, EBI/EMI, I²C, SCI, SPI
Peripherals	LVD, POR, PWM, WDT
Voltage - Supply (Vcc/Vdd)	2.35 V ~ 2.75 V
Drawing Number	375; 987-03; ; 112
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	MC9S12KT256VPVE MC9S12KT256VPVE

MC9S12NE64 Maximum Ratings

Num	Rating	Symbol	Min	Max	Unit
1	I/O, Regulator and Analog Supply Voltage	V_DD5	0.3	4.5	V
2	Digital Logic Supply Voltage(1)	V_DD	0.3	3.0	V
3	PLL Supply Voltage 1	V_DDPLL	0.3	3.0	V
4	Voltage difference V_DDX to V_DDRand V_DDA	V_DDX	0.3	0.3	V
5	Voltage difference V_SSX to V_SSR and V_SSA	V_SSX	0.3	0.3	V
6	Digital I/O Input Voltage	V_IN	0.3	6.5	V
7	Analog Reference	V_RH, V_RL	0.3	6.5	V
8	XFC, EXTAL, XTAL inputs	V_ILV	0.3	3.0	V
9	TEST input	V_TEST	0.3	10.0	V
10	Instantaneous Maximum Current Single pin limit for all digital I/O pins (2)	I_D	25	+25	mA
11	Instantaneous Maximum Current Single pin limit for XFC, EXTAL, XTAL(3)	I_DL	25	+25	mA
12	Instantaneous Maximum Current Single pin limit for TEST(4)	I_DT	0.25	0	mA
13	Operating Temperature Range (packaged)	T_A	40	105	°C
14	Operating Temperature Range (junction)	T_J	40	125	°C
15	Storage Temperature Range	T_stg	65	155	°C

MC9S12NE64 Features

• 16-bit HCS12 core
- HCS12 CPU
Upward compatible with M68HC11 instruction set
Interrupt stacking and programmer's model identical to M68HC11
Instruction queue
Enhanced indexed addressing
- Memory map and interface (MMC)
- Interrupt control (INT)
- Background debug mode (BDM)
- Enhanced debug12 module, including breakpoints and change-of-flow trace buffer (DBG)
- Multiplexed expansion bus interface (MEBI) - available only in 112-pin package version
• Wakeup interrupt inputs
- Up to 21 port bits available for wakeup interrupt function with digital filtering
• Memory
- 64K bytes of FLASH EEPROM
- 8K bytes of RAM
• Analog-to-digital converter (ATD)
- One 8-channel module with 10-bit resolution
- External conversion trigger capability
• Timer module (TIM)
- 4-channel timer
- Each channel configurable as either input capture or output compare
- Simple PWM mode
- Modulo reset of timer counter
- 16-bit pulse accumulator
- External event counting
- Gated time accumulation
• Serial interfaces
- Two asynchronous serial communications interface (SCI)
- One synchronous serial peripheral interface (SPI)
- One inter-IC bus (IIC)
• Ethernet Media access controller (EMAC)
- IEEE 802.3 compliant
- Medium-independent interface (MII)
- Full-duplex and half-duplex modes
- Flow control using pause frames
- MII management function
- Address recognition
Frames with broadcast address are always accepted or always rejected
Exact match for single 48-bit individual (unicast) address
Hash (64-bit hash) check of group (multicast) addresses
Promiscuous mode
• Ethertype filter
• Loopback mode
• Two receive and one transmit Ethernet buffer interfaces
• Ethernet 10/100 Mbps transceiver (EPHY)
- IEEE 802.3 compliant
- Digital adaptive equalization
- Half-duplex and full-duplex
- Auto-negotiation next page ability
- Baseline wander (BLW) correction
- 125-MHz clock generator and timing recovery
- Integrated wave-shaping circuitry
- Loopback modes
• CRG (clock and reset generator module)
- Windowed COP watchdog
- Real-time interrupt
- Clock monitor
- Pierce oscillator
- Phase-locked loop clock frequency multiplier
- Limp home mode in absence of external clock
- 25-MHz crystal oscillator reference clock
• Operating frequency
- 50 MHz equivalent to 25 MHz bus speed for single chip
- 32 MHz equivalent to 16 MHz bus speed in expanded bus modes
• Internal 2.5-V regulator
- Supports an input voltage range from 3.3 V ± 5%
- Low-power mode capability
- Includes low-voltage reset (LVR) circuitry
• 80-pin TQFP-EP or 112-pin LQFP package
- Up to 70 I/O pins with 3.3 V input and drive capability (112-pin package)
- Up to two dedicated 3.3 V input only lines (IRQ, XIRQ)
• Development support
- Single-wire background debug™ mode (BDM)
- On-chip hardware breakpoints
- Enhanced DBG debug features

MC9S12NE64 Connection Diagram

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