MB40C558V, MB40C568H, MB40C568H9FV-G-BND-EF Selling Leads, Datasheet
MFG:FUJITSU Package Cooled:2000 D/C:SSOP
MB40C558V, MB40C568H, MB40C568H9FV-G-BND-EF Datasheet download
Part Number: MB40C558V
MFG: FUJITSU
Package Cooled: 2000
D/C: SSOP
MB40C558V, MB40C568H, MB40C568H9FV-G-BND-EF
- Table of contents:
Info of MB40C558V
Info of MB40C568H
Info of MB40C568H9FV-G-BND-EF
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About MB40
PDF/DataSheet Download
Datasheet: MB40
File Size: 119405 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
About MB40C568H
PDF/DataSheet Download
Datasheet: MB40C568H
File Size: 166018 KB
Manufacturer: FUJITSU [Fujitsu Media Devices Limited]
Download : Click here to Download
About MB40
PDF/DataSheet Download
Datasheet: MB40
File Size: 119405 KB
Manufacturer: ETC [ETC]
Download : Click here to Download
MB40C568H General Description
The MB40C568H is a high-speed A/D converter using high-speed CMOS process technology
MB40C568H Maximum Ratings
| Parameter | Symbol | Rating | Unit | |
| Min. | Max. | |||
| Power supply voltage | AVDD, DVDD | 0.3 | 0.7 | V |
| Input voltage | CLK, VINA VRT, VRB |
0.3 | AVDD+0.3 | V |
| Output voltage | D1 to D8 | 0.3 | DVDD+0.3 | V |
| Storage temperature | Tstg | -55 | +125 | °C |
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
MB40C568H Features
• Resolution: 8 bits
• Linearity error: ±0.20% (Typ.)
• Maximum conversion rate: 30 MSPS (Min.)
• Power supply voltage:Analog section +5.0 V
Digital section +3.0 V or +5.0 V
• Digital input voltage range: TTL level
• Digital output voltage range: CMOS level compatible
• Analog input voltage range: 0.5 to 4 V (with 2 Vp-p)
• Analog input capacity: 15 pF (Typ.)
• Power consumption: 90 mW (Typical: @fCLK = 30 MHz, AVDD = 5 V, DVDD = 3 V)
110 mW (Typical:@fCLK = 30 MHz, AVDD = DVDD = 5 V)
• Additional function: Reference voltage generator circuit: VREFT = 3 V, VREFB = 1 V
• Package options: SOP24, SSOP24
• Linearity error: ±0.20% (Typ.)
• Maximum conversion rate: 30 MSPS (Min.)
• Power supply voltage:Analog section +5.0 V
Digital section +3.0 V or +5.0 V
• Digital input voltage range: TTL level
• Digital output voltage range: CMOS level compatible
• Analog input voltage range: 0.5 to 4 V (with 2 Vp-p)
• Analog input capacity: 15 pF (Typ.)
• Power consumption: 90 mW (Typical: @fCLK = 30 MHz, AVDD = 5 V, DVDD = 3 V)
110 mW (Typical:@fCLK = 30 MHz, AVDD = DVDD = 5 V)
• Additional function: Reference voltage generator circuit: VREFT = 3 V, VREFB = 1 V
• Package options: SOP24, SSOP24
MB40C568H Connection Diagram
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