MAX1210EWG, MAX1215, MAX1215EEI Selling Leads, Datasheet
MFG:MAXIM Package Cooled:SMD D/C:08+09+
MAX1210EWG, MAX1215, MAX1215EEI Datasheet download
Part Number: MAX1210EWG
MFG: MAXIM
Package Cooled: SMD
D/C: 08+09+
MFG:MAXIM Package Cooled:SMD D/C:08+09+
MAX1210EWG, MAX1215, MAX1215EEI Datasheet download
MFG: MAXIM
Package Cooled: SMD
D/C: 08+09+
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PDF/DataSheet Download
Datasheet: MAX002
File Size: 42133 KB
Manufacturer: FILTRONIC [Filtronic Compound Semiconductors]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MAX1215
File Size: 360215 KB
Manufacturer: MAXIM [Maxim Integrated Products]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: MAX002
File Size: 42133 KB
Manufacturer: FILTRONIC [Filtronic Compound Semiconductors]
Download : Click here to Download
The MAX1215 is a monolithic, 12-bit, 250Msps analogto- digital converter (ADC) optimized for outstanding dynamic performance at high-IF frequencies up to 300MHz. The product operates with conversion rates up to 250Msps while consuming only 975mW.
At 250Msps and an input frequency up to 250MHz, the MAX1215 achieves a spurious-free dynamic range (SFDR) of 72.4dBc. Its excellent signal-to-noise ratio (SNR) of 66dB at 10MHz remains flat (within 2dB) for input tones up to 300MHz. This ADC yields an excellent low noise floor of -67.5dBFS, which makes it ideal for wideband applications such as cable-head end receivers and power-amplifier predistortion in cellular base-station transceivers.
The MAX1215 requires a single 1.8V supply. The analog input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 340MHz. This helps to reduce the phase noise of the input clock source. A low-voltage differential signal (LVDS) sampling clock is recommended for best performance.
The converter's digital outputs are LVDS compatible and the data format can be selected to be either two's complement or offset binary.
The MAX1215 is available in a 68-pin QFN package with exposed paddle (EP) and is specified over the industrial (-40°C to +85°C) temperature range.
See the Pin-Compatible Versions table for a complete selection of 8-bit, 10-bit, and 12-bit high-speed ADCs in this family.
AVCC to AGND .................................................... -0.3V to +2.1V
OVCC to OGND .................................................. -0.3V to +2.1V
AVCC to OVCC ................................................... -0.3V to +2.1V
AGND to OGND .................................................. -0.3V to +0.3V
INP, INN to AGND...................................-0.3V to (AVCC + 0.3V)
All Digital Inputs to AGND.......................-0.3V to (AVCC + 0.3V)
REFIO, REFADJ to AGND ........................-0.3V to (AVCC + 0.3V)
All Digital Outputs to OGND ...................-0.3V to (OVCC + 0.3V)
ESD on All Pins (Human Body Model) ............................±2000V
Thermal Resistance
jC ...............................................................................0.8°C/W
jA.................................................................................35°C/W
Operating Temperature Range .......................-40°C to +85°C
Junction Temperature ...................................................+150°C
Storage Temperature Range .........................-60°C to +150°C
Maximum Current into Any Pin............................................50mA
Lead Temperature (soldering,10s) ................................+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
· 250Msps Conversion Rate
· Low Noise Floor of -67.5dBFS
· Excellent Low-Noise Characteristics
SNR = 65.5dB at fIN = 100MHz
SNR = 65dB at fIN = 250MHz
· Excellent Dynamic Range
SFDR = 70.7dBc at fIN = 100MHz
SFDR = 72.4dBc at fIN = 250MHz
· 65.4dB NPR for fNOTCH = 28.8MHz and a Noise Bandwidth of 50MHz
· Single 1.8V Supply
· 1006mW Power Dissipation at fSAMPLE = 250MHz and fIN = 100MHz
· On-Chip Track-and-Hold Amplifier
· Internal 1.24V-Bandgap Reference
· On-Chip Selectable Divide-by-2 Clock Input
· LVDS Digital Outputs with Data Clock Output
· MAX1215 EV Kit Available