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M58CR032D-100ZB6, M58CR064C, M58CR064C-90ZB6

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Info of M58CR032D-100ZB6
Info of M58CR064C
Info of M58CR064C-90ZB6

M58CR032D-100ZB6, M58CR064C, M58CR064C-90ZB6 Selling Leads, Datasheet

MFG:SGS Package Cooled:BGA D/C:N/A

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M58CR032D-100ZB6, M58CR064C, M58CR064C-90ZB6 Datasheet download

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Part Number: M58CR032D-100ZB6

MFG: SGS

Package Cooled: BGA

D/C: N/A

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M58CR064C General Description

The M58CR064 is a 64 Mbit (4Mbit x16) non-volatile Flash memory that may be erased electrically at block level and programmed in-system on a Word-by-Word basis using a 1.65V to 2V V_DD supply for the circuitry and a 1.65V to 3.3V V_DDQ supply for the Input/Output pins. An optional 12V VPP power supply is provided to speed up customer
programming. In M58CR064C and M58CR064D the V_PPpin can also be used as a control pin to provide absolute protection against program or erase. In M58CR064P and M58CR064Q this feature is disabled.

The device features an asymmetrical block architecture.M58CR064 has an array of 135 blocks,and is divided into two banks, Banks A and B. The Dual Bank Architecture allows Dual Operations,while programming or erasing in one bank, Read operations are possible in the other bank. Only one bank at a time is allowed to be in Program or Erase mode. It is possible to perform burst reads that cross bank boundaries. The bank architecture is summarized in Table 2, and the memory maps are shown in Figure 4. The Parameter Blocks are located at the top of the memory address space for the M58CR064C and M58CR064P, and at the bottom for the M58CR064D and M58CR064Q.

Each block can be erased separately. Erase can be suspended, in order to perform program in any other block, and then resumed. Program can be suspended to read data in any other block and then resumed. Each block can be programmed and erased over 100,000 cycles using the supply voltage V_DD.

Program and Erase commands are written to the Command Interface of the memory. An internal Program/Erase Controller takes care of the timings necessary for program and erase operations. The end of a program or erase operation can be detected and any error conditions identified in the Status Register. The command set required to control the memory is consistent with JEDEC standards.The device supports synchronous burst read and asynchronous read from all blocks of the memory array; at power-up the device is configured for asynchronous read. In synchronous burst mode, data is output on each clock cycle at frequencies of up to 54MHz.

The M58CR064 features an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. All blocks have three levels of protection. They can be locked and locked-down individually preventing any accidental programming or erasure. In M58CR064C and M58CR064D there is an additional hardware protection against program and erase. When V_PP V_PPLK all blocks are protected against program or erase. All blocks are locked at Power- Up.

The device includes a Protection Register and a Security Block to increase the protection of a system's design. The Protection Register is divided into two segments: a 64 bit segment containing a unique device number written by ST, and a 128 bit segment One-Time-Programmable (OTP) by the user. The user programmable segment can be
permanently protected. The Security Block, parameter block 0, can be permanently protected by the user. Figure 5, shows the Security Block and Protection Register Memory Map.

The memory is offered in a TFBGA56, 6.5 x10mm, 0.75 mm ball pitch package and is supplied with all the bits erased (set to '1').

M58CR064C Maximum Ratings

Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied.Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Symbol	Parameter			Unit
		Value
		Min	Max
T_A	Ambient Operating Temperature	-40	85	°C
T_BIAS	Temperature Under Bias	-40	125	°C
T_STG	Storage Temperature	-55	155	°C
V_IO	Input or Output Voltage	-0.5	V_DDQ+0.5	V
V_DD	Supply Voltage	-0.5	2.7	V
V_DDQ	Input/Output Supply Voltage	-0.5	3.6	V
V_PP	Program Voltage	-0.5	13	V
I_O	Output Short Circuit Current		100	mA
t_VPPH	Time for V_PP at V_PPH		100	hours

M58CR064C Features

` SUPPLY VOLTAGE
    V_DD = 1.65V to 2V for Program, Erase and Read
    V_DDQ= 1.65V to 3.3V for I/O Buffers
    V_PP = 12V for fast Program (optional)
` SYNCHRONOUS / ASYNCHRONOUS READ
    Synchronous Burst Read mode : 54MHz
    Asynchronous/ Synchronous Page Read mode
    Random Access: 85, 90, 100, 120ns
`PROGRAMMING TIME
    10s by Word typical
    Double/Quadruple Word Program option
` MEMORY BLOCKS
    Dual Bank Memory Array: 16/48 Mbit
    Parameter Blocks (Top or Bottom location)
` DUAL OPERATIONS
    Program Erase in one Bank while Read in other
    No delay between Read and Write operations
` BLOCK LOCKING
    All blocks locked at Power up
    Any combination of blocks can be locked
    WP for Block Lock-Down
` SECURITY
    128 bit user programmable OTP cells
    64 bit unique device number
     One parameter block permanently lockable
` COMMON FLASH INTERFACE (CFI)
` 100,000 PROGRAM/ERASE CYCLES per BLOCKn ELECTRONIC SIGNATURE
    Manufacturer Code: 20h
    Top Device Code, M58CR064C: 88CAh
    Bottom Device Code, M58CR064D: 88CBh
    Top Device Code, M58CR064P: 8801h
    Bottom Device Code, M58CR064Q: 8802h

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