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KM416S4030CTGL, KM416S4030CT-L10, KM416S8030

Table of contents:
Info of KM416S4030CTGL
Info of KM416S4030CT-L10
Info of KM416S8030

KM416S4030CTGL, KM416S4030CT-L10, KM416S8030 Selling Leads, Datasheet

MFG:SAMSUNG Package Cooled:SO54 D/C:2006

KM416S4030CTGL, KM416S4030CT-L10, KM416S8030 Picture

KM416S4030CTGL, KM416S4030CT-L10, KM416S8030 Datasheet download

Five Points

Part Number: KM416S4030CTGL

MFG: SAMSUNG

Package Cooled: SO54

D/C: 2006

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KM416S8030 General Description

The KM416S8030 is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG¢s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clcok cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

KM416S8030 Maximum Ratings

Parameter	Symbol	Value	Unit
Voltage on any pin relative to VSS	V_IN, V_OUT	-1.0 ~ 4.6	V
Voltage on VDD supply relative to VSS	V_DD, V_DDQ	-1.0 ~ 4.6	V
Storage temperature	T_STG	-55 ~ +150	°C
Power dissipation	P_D	1.0	W
Short circuit current	I_OS	50	mA

Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability.

KM416S8030 Features

• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS Latency (2 & 3)
-. Burst Length (1, 2, 4, 8 & full page)
-. Burst Type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock.
• Burst Read Single-bit Write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (4K cycle)

KM416S8030 Connection Diagram

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