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HY29F040T-90, HY29F080, HY29F080AT-70

Table of contents:
Info of HY29F040T-90
Info of HY29F080
Info of HY29F080AT-70

HY29F040T-90, HY29F080, HY29F080AT-70 Selling Leads, Datasheet

MFG:HY Package Cooled:TSOP D/C:TSOP

HY29F040T-90, HY29F080, HY29F080AT-70 Picture

HY29F040T-90, HY29F080, HY29F080AT-70 Datasheet download

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Part Number: HY29F040T-90

MFG: HY

Package Cooled: TSOP

D/C: TSOP

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HY29F080 General Description

The HY29F080 is an 8 Megabit, 5 volt-only CMOS Flash memory organized as 1,048,576 (1M) bytes of eight-bits each. The device is offered in industry- standard 44-pin PSOP and 40-pin TSOP packages. The HY29F080 can be programmed and erased in-system with a single 5-volt VCC supply. Internally generated and regulated voltages are provided for program and erase operations, so that the device does not require a high voltage power supply to perform those functions. The device can also be programmed in standard EPROM programmers.

Access times as fast as 70ns over the full operating voltage range of 5.0 volts ± 10% are offered for timing compatibility with the zero wait state requirements of high speed microprocessors.

To eliminate bus contention, the HY29F080 has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device is compatible with the JEDEC single power-supply Flash command set standard. Commands are written to the command register using standard microprocessor write timings, from where they are routed to an internal state-machine that controls the erase and programming circuits. Device programming is performed a byte at a time by executing the four-cycle Program Command. This initiates an internal algorithm that automatically times the program pulse widths and verifies proper cell margin.

The HY29F080's sector erase architecture allows any number of array sectors to be erased and reprogrammed without affecting the data contents of other sectors. Device erasure is initiated by executing the Erase Command. This initiates an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase cycles, the device automatically times the erase pulse widths and verifies proper cell margin. To protect data in the device from accidental or unauthorized attempts to program or erase the device while it is in the system (e.g., by a virus), the device has a Sector Group Protect function which hardware write protects selected sector groups. The sector group protect and unprotect features can be enabled in a PROM programmer. Temporary Sector Unprotect, which requires a high voltage, allows in-system erasure and code changes in previously protected sectors.

Erase Suspend enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The device is fully erased when shipped from the factory.

Addresses and data needed for the programming and erase operations are internally latched during write cycles, and the host system can detect completion of a program or erase operation by observing the RY/BY# pin, or by reading the DQ[7] (Data# Polling) and DQ[6] (toggle) status bits. Reading data from the device is similar to reading from SRAM or EPROM devices. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions.

The host can place the device into the standby mode. Power consumption is greatly reduced in this mode.

HY29F080 Features

` 5 Volt Read, Program, and Erase
Minimizes system-level power requirements
` High Performance
Access times as fast as 70 ns
` Low Power Consumption
15 mA typical active read current
30 mA typical program/erase current
5 µA maximum CMOS standby current
` Compatible with JEDEC Standards
Package, pinout and command-set compatible with the single-supply Flash device standard
Provides superior inadvertent write protection
` Sector Erase Architecture
Sixteen equal size sectors of 64K bytes each
A command can erase any combination of sectors
Supports full chip erase
` Erase Suspend/Resume
Temporarily suspends a sector erase operation to allow data to be read from, or programmed into, any sector not being erased
` Sector Group Protection
Sectors may be locked in groups of two to prevent program or erase operations within that sector group
` Temporary Sector Unprotect
Allows changes in locked sectors (requires high voltage on RESET# pin)
` Internal Erase Algorithm
Automatically erases a sector, any combination of sectors, or the entire chip
` Internal Programming Algorithm
Automatically programs and verifies data at a specified address
` Fast Program and Erase Times
Byte programming time: 7 µs typical
Sector erase time: 1.0 sec typical
Chip erase time: 16 sec typical
` Data# Polling and Toggle Status Bits
Provide software confirmation of completion of program or erase operations
` Ready/Busy# Pin
Provides hardware confirmation of completion of program and erase operations
` Minimum 100,000 Program/Erase Cycles
` Space Efficient Packaging
Available in industry-standard 40-pin TSOP and 44-pin PSOP packages

HY29F080 Connection Diagram

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