FSTD162861MTD, FSTD162861MTDX, FSTD16450 Selling Leads, Datasheet
MFG:Fairchild Package Cooled:N/A D/C:09+
FSTD162861MTD, FSTD162861MTDX, FSTD16450 Datasheet download
Part Number: FSTD162861MTD
MFG: Fairchild
Package Cooled: N/A
D/C: 09+
FSTD162861MTD, FSTD162861MTDX, FSTD16450
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Info of FSTD162861MTD
Info of FSTD162861MTDX
Info of FSTD16450
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About FSTD162861MTD
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Datasheet: FSTD162861MTD
File Size: 178086 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
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About FST10020
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Datasheet: FST10020
File Size: 135828 KB
Manufacturer: MCC [Micro Commercial Components]
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About FSTD16450
PDF/DataSheet Download
Datasheet: FSTD16450
File Size: 420862 KB
Manufacturer: FAIRCHILD [Fairchild Semiconductor]
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FSTD16450 General Description
The Fairchild Universal Bus Switch FSTD16450 provides 4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit of high-speed CMOS TTL-compatible bus switching. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
The FSTD16450 is designed to allow "customer" configura- tion control of the enable connections. The device is orga- nized as either a 4-bit, 5-bit, 10-bit or 20-bit bus switch. 8- bit and 16-bit configurations are also achievable (see Func- tional Description). The device's bit configuration is chosen through select pin logic. (see Truth Table). When OE is LOW, Port A is connected to Port B . When OE is HIGH, the switch is OPEN.
Another key device feature is the addition of a level shifting select pin, "S ". When S is LOW, the device behaves as a standard N-MOS switch. When S is HIGH, a diode to VCC is integrated into the circuit allowing for level shifting between 5V inputs and 3.3V outputs.
The FSTD16450 is designed to allow "customer" configura- tion control of the enable connections. The device is orga- nized as either a 4-bit, 5-bit, 10-bit or 20-bit bus switch. 8- bit and 16-bit configurations are also achievable (see Func- tional Description). The device's bit configuration is chosen through select pin logic. (see Truth Table). When OE is LOW, Port A is connected to Port B . When OE is HIGH, the switch is OPEN.
Another key device feature is the addition of a level shifting select pin, "S ". When S is LOW, the device behaves as a standard N-MOS switch. When S is HIGH, a diode to VCC is integrated into the circuit allowing for level shifting between 5V inputs and 3.3V outputs.
FSTD16450 Maximum Ratings
Supply Voltage (VCC)................ ..............−0.5V to +7.0V
DC Switch Voltage (VS) (Note 3) .............−0.5V to +7.0V
DC Input Control Pin Voltage
(VIN) (Note 4) ........................................ −0.5V to +7.0V
DC Input Diode Current (l IK) VIN < 0V ............ ..−50 mA
DC Output (IOUT) Current .................................. 128 mA
DC VCC/GND Current (ICC/IGND) +/.................. − 100 mA
Storage Temperature Range (TSTG) ......−65 to +150
DC Switch Voltage (VS) (Note 3) .............−0.5V to +7.0V
DC Input Control Pin Voltage
(VIN) (Note 4) ........................................ −0.5V to +7.0V
DC Input Diode Current (l IK) VIN < 0V ............ ..−50 mA
DC Output (IOUT) Current .................................. 128 mA
DC VCC/GND Current (ICC/IGND) +/.................. − 100 mA
Storage Temperature Range (TSTG) ......−65 to +150
FSTD16450 Features
4switch connection between two ports
Voltage level shifting
Minimal propagation delay through the switch
Low lCC
Zero bounce in flow-through mode
Control inputs compatible with TTL level
Also packaged in plastic Fine-Pitch Ball Grid Array(FBGA) (Preliminary)
FSTD16450 Typical Application
Select pins S0, S1, S2 are intended to be used as static user configurable control pins. The AC performance of these pins has not been characterized or tested. Switching of these select pins during system operation may tempo- rarily disrupt output logic states and/or enable pin controls.
FSTD16450 Connection Diagram
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