MFG:Texas Instruments Category:Integrated Circuits (ICs) Package Cooled:SOP16 D/C:07+
CD74HCT174MG4, CD74HCT174MS2075, CD74HCT175 Datasheet download
Category: Integrated Circuits (ICs)
MFG: Texas Instruments
Package Cooled: SOP16
D/C: 07+
Description: IC HEX D-TYPE F-F HS 16SOIC
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PDF/DataSheet Download
Datasheet: CD7232CS
File Size: 342887 KB
Manufacturer:
Download : Click here to Download
PDF/DataSheet Download
Datasheet: CD7232CS
File Size: 342887 KB
Manufacturer:
Download : Click here to Download
PDF/DataSheet Download
Datasheet: CD74HCT175
File Size: 56446 KB
Manufacturer: TI
Download : Click here to Download
| Technical/Catalog Information | CD74HCT174MG4 |
| Vendor | Texas Instruments |
| Category | Integrated Circuits (ICs) |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (3.9mm Width) |
| Function | Master Reset |
| Number of Bits per Element | 6 |
| Number of Elements | 1 - Single |
| Current - Output High, Low | 4mA, 4mA |
| Output Type | Non-Inverted |
| Trigger Type | Positive Edge |
| Type | D-Type Bus |
| Packaging | Tube |
| Operating Temperature | -55°C ~ 125°C |
| Delay Time - Propagation | 17ns |
| Frequency - Clock | 25MHz |
| Voltage - Supply | 4.5 V ~ 5.5 V |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | CD74HCT174MG4 CD74HCT174MG4 |
The 'HC175 and 'HCT175 are high speed Quad D-type Flip- Flops with individual D-inputs and Q, Q complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q outputs to a logic 1.
• Common Clock and Asynchronous Reset on Four D-Type Flip-Flops
• Positive Edge Pulse Triggering
• Complementary Outputs
• Buffered Inputs
• Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1A at VOL, VOH
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