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CD74HCT08T08N, CD74HCT10, CD74HCT107

Table of contents:
Info of CD74HCT08T08N
Info of CD74HCT10
Info of CD74HCT107

CD74HCT08T08N, CD74HCT10, CD74HCT107 Selling Leads, Datasheet

MFG:HARRIS Package Cooled:SOP3.9 D/C:90

CD74HCT08T08N, CD74HCT10, CD74HCT107 Picture

CD74HCT08T08N, CD74HCT10, CD74HCT107 Datasheet download

Five Points

Part Number: CD74HCT08T08N

MFG: HARRIS

Package Cooled: SOP3.9

D/C: 90

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CD74HCT10 Parameters

CD74HCT10 Features

Buffered Inputs
Typical Propagation Delay: 8ns at V_CC = 5V, C_L = 15pF, T_A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
Wide Operating Temperature Range...-55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

CD74HCT10 General Description

High Speed CMOS Logic Triple 3-Input NAND Gates

CD74HCT10 Maximum Ratings

DC Supply Voltage, V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I> V_CC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I_OK
For V_O < -0.5V or V_O > V_CC+ 0.5V . . . . . . . . . . . . . . . . . . . . ±20mA
DC Output Source or Sink Current per Output Pin, IO
For V_O> -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_CC orI_GND. . . . . . . . . . . . . . . . . ±50mA

CD74HCT10 Features

Buffered Inputs
Typical Propagation Delay: 8ns at V_CC = 5V, C_L = 15pF, T_A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
Wide Operating Temperature Range...-55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

CD74HCT10 Typical Application

CD74HCT10 Datasheet

CD74HCT10 Connection Diagram

CD74HCT107 General Description

The 'HC107 and 'HCT107 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.

These flip-flops have independent J, K, Reset and Clock inputs and Q and Q outputs. They change state on the negative-going transition of the clock pulse. Reset is accomplished asynchronously by a low level input. This device is functionally identical to the HC/HCT73 but differs in terminal assignment and in some parametric limits. The HCT logic family is functionally as well as pin compatible with the standard LS family.

CD74HCT107 Maximum Ratings

DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . . ...±20mA
DC Output Source or Sink Current per Output Pin, IO
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_CC or I_GND . . . . . . . . . . . . . . . ..±50mA

CD74HCT107 Features

• Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
• Asynchronous Reset
• Complementary Outputs
• Buffered Inputs
• Typical fMAX = 60MHz at V_CC = 5V, C_L = 15pF, T_A = 25
• Fanout (Over Temperature Range)
    - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55 to 125
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
    - 2V to 6V Operation
    - High Noise Immunity: NIL = 30%, NIH = 30% of _VCC at V_CC = 5V
• HCT Types
    - 4.5V to 5.5V Operation
    - Direct LSTTL Input Logic Compatibility, V_IL= 0.8V (Max), V_IH = 2V (Min)
    - CMOS Input Compatibility, Ii 1mA at V_OL, V_OH

CD74HCT107 Connection Diagram

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