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CD74HC648, CD74HC648E, CD74HC648EN

Table of contents:
Info of CD74HC648
Info of CD74HC648E
Info of CD74HC648EN

CD74HC648, CD74HC648E, CD74HC648EN Selling Leads, Datasheet

MFG:GS Package Cooled:DIP D/C:98

CD74HC648, CD74HC648E, CD74HC648EN Picture

CD74HC648, CD74HC648E, CD74HC648EN Datasheet download

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Part Number: CD74HC648

MFG: GS

Package Cooled: DIP

D/C: 98

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CD74HC648 General Description

The Harris CD74HC646 and CD74HC648 are octal bus transceivers/registers with three-state non-inverting outputs. The Harris CD74HC648 is an octal bus transceiver/register with three-state inverting outputs. These devices are bus transceivers with D-type flip-flops which act as internal storage registers. Data on the A bus or the B bus can be clocked into the registers on the LOW-to-HIGH transition of either CAB or CBA clock inputs. Outputs enable (OE) and direction (DIR) inputs control the transceiver functions. Data present at the high impedance output can be stored in either register or both but only one of the two buses can be enabled as outputs at any one time. The select controls (SAB and SBA) can multiplex stored and transparent (real time) data. The direction control determines which data bus will receive data when the output enable (OE) is LOW. In the high impedance mode (output enable HIGH), A data can be stored in one register and B data can be stored in the other register. The clocks are not gated with the direction (DIR) and output enable (OE) terminals; data at the A or B terminals can be clocked into the storage flip-flops at any time.

CD74HC648 Maximum Ratings

DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For V_I < -0.5V or V_I> V_CC + 0.5V . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . .±20mA
DC Drain Current, per Output, I_O
For -0.5V < V_O < V_CC + 0.5V. . . . . . . . . . . . . . . . . . . . . . .±35mA
DC Output Source or Sink Current per Output Pin, I_O
For V_O > -0.5V or V_O< V_CC + 0.5V . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_CC . . . . . . . . . . . . . . . . . . . . . ±50mA

CD74HC648 Features

• Independent Registers for A and B Buses
• CD74HC646 Non-Inverting
• CD74HC648 Inverting
• Three-State Outputs
• Drives 15 LSTTL Loads
• Typical Propagation Delay = 12ns (A to B, B to A) at V_CC = 5V, C_L = 15pF, T_A = 25oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of VCC at V_CC = 5V

CD74HC648 Connection Diagram

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