CD74FCT240M96, CD74FCT240SM, CD74FCT244 Selling Leads, Datasheet
MFG:HAR Package Cooled:SOP-7.2 D/C:95
CD74FCT240M96, CD74FCT240SM, CD74FCT244 Datasheet download
Part Number: CD74FCT240M96
MFG: HAR
Package Cooled: SOP-7.2
D/C: 95
CD74FCT240M96, CD74FCT240SM, CD74FCT244
- Table of contents:
Info of CD74FCT240M96
Info of CD74FCT240SM
Info of CD74FCT244
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About CD7232CS
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Datasheet: CD7232CS
File Size: 342887 KB
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About CD7232CS
PDF/DataSheet Download
Datasheet: CD7232CS
File Size: 342887 KB
Manufacturer:
Download : Click here to Download
About CD74FCT244
PDF/DataSheet Download
Datasheet: CD74FCT244
File Size: 88719 KB
Manufacturer:
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CD74FCT244 General Description
The CD74FCT244 and CD74FCT244AT are octal buffer/line drivers with 3-state outputs using a small-geometry BiCMOS technology. The output stages are a combination of bipolar and CMOS transistors that limit the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces the power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 mA.
These devices are organized as two 4-bit buffers/line drivers with separate active-low output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The CD74FCT244 and CD74FCT244AT devices are characterized for operation from 0°C to 70°C.
CD74FCT244 Maximum Ratings
DC supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6 V
DC input clamp current, IIK (VI < 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
DC output clamp current, IOK (VO < 0.5 V) . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . .50 mA
DC output sink current per output pin, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .70 mA
DC output source current per output pin, IOH . . . . . . . . . . . . . .. . . . . . . . . . . . . .. . .30 mA
Continuous current through VCC, ICC . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140 mA
Continuous current through GND . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .. .528 mA
Package thermal impedance, JA (see Note 1) E package) . .. . . . . . . . . . . . . . . . .. .69°C/W
M package) . . . . . . . . . . . . . . . . . . . . 58°C/W
SM package) . . . . . . . . . . . . . . . . . .70°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . 65°C to 150°C
DC input clamp current, IIK (VI < 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
DC output clamp current, IOK (VO < 0.5 V) . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . .50 mA
DC output sink current per output pin, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .70 mA
DC output source current per output pin, IOH . . . . . . . . . . . . . .. . . . . . . . . . . . . .. . .30 mA
Continuous current through VCC, ICC . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140 mA
Continuous current through GND . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .. .528 mA
Package thermal impedance, JA (see Note 1) E package) . .. . . . . . . . . . . . . . . . .. .69°C/W
M package) . . . . . . . . . . . . . . . . . . . . 58°C/W
SM package) . . . . . . . . . . . . . . . . . .70°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . 65°C to 150°C
CD74FCT244 Features
BiCMOS Technology With Low Quiescent Power
Buffered Inputs
Noninverted Outputs
Input/Output Isolation From VCC
Controlled Output Edge Rates
64-mA Output Sink Current
Output Voltage Swing Limited to 3.7 V at VCC = 5 V
SCR Latch-Up-Resistant BiCMOS Process and Circuit Design
Package Options Include Plastic Small-Outline (M) and Shrink Small-Outline (SM) Packages and Standard Plastic (E) DIP
Buffered Inputs
Noninverted Outputs
Input/Output Isolation From VCC
Controlled Output Edge Rates
64-mA Output Sink Current
Output Voltage Swing Limited to 3.7 V at VCC = 5 V
SCR Latch-Up-Resistant BiCMOS Process and Circuit Design
Package Options Include Plastic Small-Outline (M) and Shrink Small-Outline (SM) Packages and Standard Plastic (E) DIP
CD74FCT244 Connection Diagram
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