uPSD33xx

Features: `FAST 8-BIT TURBO 8032 MCU, 40MHz Advanced core, 4-clocks per instruction 10 MIPs peak performance at 40MHz (5V) JTAG Debug and In-System Programming Branch Cache & 6 instruction Prefetch Queue Dual XDATA pointers with auto incr & decr Compatible with 3rd party 8051 tools` DUA...

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SeekIC No. : 004538448 Detail

uPSD33xx: Features: `FAST 8-BIT TURBO 8032 MCU, 40MHz Advanced core, 4-clocks per instruction 10 MIPs peak performance at 40MHz (5V) JTAG Debug and In-System Programming Branch Cache & 6 instruction Pref...

floor Price/Ceiling Price

Part Number:
uPSD33xx
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/22

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Product Details

Description



Features:

`FAST 8-BIT TURBO 8032 MCU, 40MHz
   Advanced core, 4-clocks per instruction
   10 MIPs peak performance at 40MHz (5V)
   JTAG Debug and In-System Programming
  Branch Cache & 6 instruction Prefetch Queue
  Dual XDATA pointers with auto incr & decr
  Compatible with 3rd party 8051 tools
` DUAL FLASH MEMORIES WITH MEMORY MANAGEMENT
   Place either memory into 8032 program address space or data address space
   READ-while-WRITE operation for In- Application Programming and EEPROM emulation
   Single voltage program and erase
   100K guaranteed erase cycles, 15-year retention
` CLOCK, RESET, AND SUPPLY MANAGEMENT
    SRAM is Battery Backup capable
    Flexible 8-level CPU clock divider register
    Normal, Idle, and Power Down Modes
    Power-on and Low Voltage reset supervisor
    Programmable Watchdog Timer
` PROGRAMMABLE LOGIC, GENERAL PURPOSE
    16 macrocells
    Create shifters, state machines, chipselects, glue-logic to keypads, panels, LCDs, others
` COMMUNICATION INTERFACES
    I2C Master/Slave controller, 833KHz
    SPI Master controller, 10MHz
    Two UARTs with independent baud rate
    IrDA protocol support up to 115K baud
    Up to 46 I/O, 5V tolerant on 3.3V uPSD33xxV
` A/D CONVERTER
   Eight Channels, 10-bit resolution, 6µs
` TIMERS AND INTERRUPTS
   Three 8032 standard 16-bit timers
   Programmable Counter Array (PCA), six 16-bit modules for PWM, CAPCOM, and timers
   8/10/16-bit PWM operation
   11 Interrupt sources with two external interrupt pins
` OPERATING VOLTAGE SOURCE (±10%)
   5V devices use both 5.0V and 3.3V sources
   3.3V devices use only 3.3V source




Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Min.
Max.
Unit
TSTG
Storage Temperature
65
125
TLEAD
Lead Temperature during Soldering (20 seconds max.)1
235
VIO
Input and Output Voltage (Q = VOH or Hi-Z)
0.5
6.5
V
VCC
Supply Voltage
0.5
6.5
V
VPP
Device Programmer Supply Voltage
0.5
14.0
V
VESD
Electrostatic Discharge Voltage (Human Body Model) 2
2000
2000
V

Note: 1. IPC/JEDEC J-STD-020A
          2. JEDEC Std JESD22-A114A (C1=100pF, R1=1500 , R2=500 )


Description

The Turbo uPSD33xx Series combines a powerful 8051-based microcontroller with a flexible memory structure, programmable logic, and a rich peripheral mix to form an ideal embedded controller. AtuPSD33xx core is a fast 4-cycle 8032 MCU with a 6-byte instruction prefetch queue (PFQ) and a 4-entry fully associative branching cache (BC) to maximize MCU performance, enabling loops of code in smaller localities to execute extremely fast.

Code development is easily managed without a hardware In-Circuit Emulator by using the serial JTAG debug interface. JTAG uPSD33xx is also used for In- System Programming (ISP) in as little as 10 seconds, perfect for manufacturing and lab development. The 8032 core is coupled to Programmable System Device (PSD) architecture to optimize the 8032 memory structure, offering two independent banks of Flash memory that can be placed at virtually any address within 8032 program or data address space, and easily paged beyond 64K bytes using on-chip programmable decode logic. Dual Flash memory banks provide a robust solution for remote product updates in the field through In-Application
Programming (IAP). Dual Flash banks also support EEPROM emulation, eliminating the need for external EEPROM chips. General purpose programmable logic (PLD) is included to build an endless variety of glue-logic, saving external
logic devices. The PLD uPSD33xx is configured using the software development tool, PSDsoft Express, available from the web at www.st.com/psm, at no charge. The uPSD33xx also includes supervisor functions such as a programmable watchdog timer and low-voltage reset.




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