ex64

• LP/Sleep Mode for Additional Power Savings
• Advanced Small-footprint Packages
• Hot-Swap Compliant I/Os
• Single-Chip Solution
• Nonvolatile
• Live on power up
• Power-Up/Down Friendly (No Sequencing Required for Supply Voltages)
• Configurable Weak-Resistor Pull-Up or Pull-Down for Tristated Outputs during Power Up
• Individual Output Slew Rate Control
• 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength
• Software Design Support with Actel Designer Series and Libero Tools
• Up to 100% Resource Utilization with 100% Pin Locking
• Deterministic Timing
• Unique In-System Diagnostic and Verification Capability with Silicon Explorer II
• Boundary Scan Testing in Compliance with IEEE Standard 1149.1 (JTAG)
• Secure Programming Technology Prevents Reverse Engineering and Design Theft

The eX family of FPGAs is a low-cost solution for low-power, high-performance designs. The inherent low power attributes of the antifuse technology, coupled with an additional low static power mode, make these devices ideal for power-sensitive applications. Fabricated with an advanced 0.22 CMOS antifuse technology, these devices achieve high performance with no power penalty.