eX128

Features:

• High-Performance, Low-Power Antifuse FPGA
• LP/Sleep Mode for Additional Power Savings
• Advanced Small-Footprint Packages
• Hot-Swap Compliant I/Os
• Single-Chip Solution
• Nonvolatile
• Live on Power-Up
• No Power-Up/Down Sequence Required for Supply Voltages
• Configurable Weak-Resistor Pull-Up or Pull-Down for Tristated Outputs during Power-Up
• Individual Output Slew Rate Control
• 2.5 V, 3.3 V, and 5.0 V Mixed-Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength
• Software Design Support with Actel Designer and Libero™ Integrated Design Environment (IDE) Tools
• Up to 100% Resource Utilization with 100% Pin Locking
• Deterministic Timing
• Unique In-System Diagnostic and Verification Capability with Silicon Explorer II
• Boundary Scan Testing in Compliance with IEEE Standard 1149.1 (JTAG)
• Fuselock™ Secure Programming Technology Prevents Reverse Engineering and Design Theft


Specifications

Symbol	Parameter	Limits	Unit
VCCI	DC Supply Voltage for I/Os	0.3 to +6.0	V
VCCA	DC Supply Voltage for Array	0.3 to +3.0	V
VI	Input Voltage	0.5 to +5.75	V
VO	Output Voltage	0.5 to +VCCI	V
TSTG	Storage Temperature	-65 to +150

Note: *Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. Devices should not be operated outside the Recommended Operating Conditions.

Description

The eX family of FPGAs is a low-cost solution for lowpower, high-performance designs. The inherent low power attributes of the antifuse technology, coupled with an additional low static power mode, make these devices ideal for power-sensitive applications. Fabricated with an advanced 0.22m CMOS antifuse technology, these devices achieve high performance with no power penalty.