Features: Multifunction charge/discharge counter Resolvessignalslessthan12.5V Internal offset calibration improvesaccuracy 1024 bits of NVRAM configured as 128x8 Internal temperature sensor for self-dischargeestimation Single-wireserialinterface Dualoperatingmodes: - Operating: <80A - Sleep: &l...
bq2018: Features: Multifunction charge/discharge counter Resolvessignalslessthan12.5V Internal offset calibration improvesaccuracy 1024 bits of NVRAM configured as 128x8 Internal temperature sensor for self...
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Symbol | Parameter | Minimum | Maximum | Uni t |
Notes |
VCC | Relative to VSS | -0.3 | +6.0 | V | |
HDQ | Relative to VSS | -0.3 | +6.0 | V | |
All other pins | VCC -0.3V | VCC +0.3V | V | ||
IREG | REG to VSS | 1.0 | mA | ||
VSR1/VSR2 |
Relative to VSS | -0.3 | +6.0 | V | Minimum 100 series resistor is recommended to protect SR1 / SR2 in case of a shorted battery. |
TOPR | Operating temperature | -20 | +6.0 | °C |
The bq2018 is a low-cost charge/discharge counter peripheral packaged in an 8-pin TSSOP or SOIC. It works with an intelligent host controller, providing state-of-charge information for rechargeable batteries.
The bq2018 measures the voltage drop across a low-value series sense resistor between the negative terminal of the battery and the battery pack ground contact. By using the accumulated counts in the charge, discharge, and self-discharge registers, an intelligent host controller can determine battery state-of-charge information. To improve accuracy, an offset count register of bq2018 is available. The system host controller is responsible for the register maintenance by resetting the charge in/out and selfdis charge registers as needed.
The bq2018 also features 128 bytes of NVRAM registers. The upper 13 bytes of NVRAM contain the capacity onitoring and status information. The RBI input operates from an external power storage source such as a capacitor or a series cell in the battery pack, providing register nonvolatility for periods when the battery is shorted to ground or when the battery charge state is not sufficient to operate the bq2018. During this mode, the register backup currentisless than 100nA.
Packaged in an 8-pin TSSOP or SOIC, the bq2018 is small enough to fit in the crevice between two A-size cells or within the width of a prismati ccell.