Features: ` Powerful Harvard Architecture Processor M8C Processor Speeds to 24 MHz Low Power at High Speed 2.4V to 5.25V Operating Voltage Operating Voltages Down to 1.0V Using On-Chip Switch Mode Pump (SMP) Industrial Temperature Range: -40°C to +85°C` Advanced Peripherals (PSoC Blocks) 4 Analog ...
CY8C21323: Features: ` Powerful Harvard Architecture Processor M8C Processor Speeds to 24 MHz Low Power at High Speed 2.4V to 5.25V Operating Voltage Operating Voltages Down to 1.0V Using On-Chip Switch Mode P...
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US $1.12 - 1.24 / Piece
Programmable Systems-on-a-Chip (PSoC) PROGRAMMABLE SYSTEM Ochip
US $1.12 - 1.2 / Piece
Programmable Systems-on-a-Chip (PSoC) CAPSENSE CONTROLLER
US $1.27 - 1.41 / Piece
Programmable Systems-on-a-Chip (PSoC) CAPSENSE CONTROLLER
Symbol |
Description |
Min |
Typ |
Max |
Units |
Notes |
TSTG |
Storage Temperature |
-55 |
- |
+100 |
Higher storage mperatures will reduce data retention time. | |
TA |
Ambient Temperature with Power Applied |
-40 |
- |
+85 |
||
Vdd |
Supply Voltage on Vdd Relative to Vss |
-0.5 |
- |
+6.0 |
V |
|
VIO |
DC Input Voltage |
Vss - 0.5 |
- |
Vdd + 0.5 |
V |
|
VIOZ |
DC Voltage Applied to Tri-state |
Vss - 0.5 |
- |
Vdd + 0.5 |
V |
|
IMIO |
Maximum Current into any Port Pin |
-25 |
- |
+50 |
mA |
|
ESD |
Electro Static Discharge Voltage |
2000 |
- |
- |
V |
Human Body Model ESD. |
LU |
Latch-up Current |
- |
- |
200 |
mA |
The PSoC™ family consists of many Mixed-Signal Array with On-Chip Controller devices,for example,CY8C21323.These devices.like CY8C21323 is designed to replace multiple traditional MCU-based system components with one, low cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, as well as programmable interconnect. This architecture allows the user to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in a range of convenient pinouts.
The PSoC architecture, as illustrated on the left, is comprised of four main areas: the Core, the System Resources, the Digital System, and the Analog System. Configurable global bus resources allow all the device resources to be combined into a complete custom system. Each PSoC device,like CY8C21323 includes four digital blocks. Depending on the PSoC package, up to two analog comparators and up to 16 general purpose IO (GPIO) are also included. The GPIO provide access to the global digital and analog interconnects.