CD54HC4520

• Positive or Negative Edge Triggering
• Synchronous Internal Carry Propagation
• Fanout (Over Temperature Range)
Standard Outputs. . . . . . . . . . . . . . .10 LSTTL Loads
Bus Driver Outputs . . . . . . . . . . . . .15 LSTTL Loads
• Wide Operating Temperature Range . . .-55Cto 125
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
2V to 6V Operation
High Noise Immunity: N_IL= 30%, NIH = 30% of V_CC
at V_CC = 5V
• HCT Types
4.5V to 5.5V Operation
Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH= 2V (Min)
CMOS Input Compatibility, I_l1µA at VOL, VOH

The CD74HC4518 is adual BCD up-counter.The'HC4520 and CD74HCT4520 are dual binary up-counters.Each device consists of two independent internally synchronous 4-stagecounters.The counter stages are D-type flip-flops having inter change able CLOCK and ENABLE lines for in crementing one ither the positive-going or the negative going ransition of CLOCK.The counters are cleared by high level son the MASTERRESET lines.

The CD54HC4520 counter can be cascaded in the rip plemode by connectingQ₃ to the ENABLE in putofthes ubse quent counter while the CLOCK input of the latter is held low.