Features: • Quad-MAC/Six-ALU DSP core• 4+1 instructions per cycle• Up to 350MHz, 8-stage pipeline design• Up to 1750 million instructions/sec• Dual 64-bit wide Load/Store data ports• Z.Turbo coprocessor extensions capable• 24-bit address space• HW ma...
ZSP540: Features: • Quad-MAC/Six-ALU DSP core• 4+1 instructions per cycle• Up to 350MHz, 8-stage pipeline design• Up to 1750 million instructions/sec• Dual 64-bit wide Load/Sto...
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The ZSP540 processor core is a high-performance/power-efficient Quad-MAC/Six-ALU implementation of the ZSP® G2 architecture. The ZSP540 utilizes a 16-bit architecture with extensive 32-bit capabilities and sets an unmatched balance of performance/power/size and memory utilization efficiency. The Z.Turbo feature provides the SOC designer with the option to extend the ZSP540 Instruction Set and the ability to add application-specific acceleration logic.