ZL50070

Note 1: Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Note 2: Typical figures are at 25, V_{DD_CORE} at 1.8 V and V_{DD_IO} at 3.3 V and are for design aid only: not guaranteed and not subject to production testing.

The ZL50070 is a non-blocking Time Division Multiplex (TDM) switch with maximum 24,576 x 24,576 channels. The device can switch 64 kbps and Nx64 kbps TDM channels from any input stream to any output stream. With a number of enhanced features, the ZL50070 is designed for high capacity voice and data switching applications.

The ZL50070 has 96 input and 96 output data streams which can operate at 8.192 Mbps, 16.384 Mbps, 32.768 Mbps or 65.536 Mbps. The large number of inputs and outputs maintains full 24 K x 24 K channel switching capacity at bit rates of 65 Mbps, 32 Mbps and 16 Mbps. Up to 24 input and output data streams may operate at 65 Mbps. Up to 48 input and output data streams may operate at 32 Mbps. Up to 96 input and output data streams may operate at 16 Mbps or 8 Mbps. The data rate can be independently set in groups of 4 input or output streams. In this way it is possible to provide rate conversion from input data channel to output data channel.

The ZL50070 uses a master clock (CKi0) and frame pulse (FPi0) to define the TDM data stream frame boundary and timing. A high speed system clock is derived internally from CKi0 and FPi0. The input and output data streams can independently reference their timings to one of the input clocks or to the internal system clock.

The ZL50070 has a variety of user configurable options designed to provide flexibility when data streams are connected to multiple TDM components or circuits. These include:
• Two additional programmable reference inputs, CKi2 - 1 and FPi2 - 1, which can be used to provide alternative sources for input and output stream timing
• Variable input bit delay and output advancement, to accommodate delays and frame offsets of streams connected through different data paths
• Four timing outputs, CKo3 - 0 and FPo3 - 0, which can be configured independently to provide a variety of clock and frame pulse options
• Support of both ST-BUS and GCI-Bus formats The ZL50070 also has a number of value added features for voice and data applications:
• Per-channel variable delay mode for low latency applications and constant delay mode for frame integrity applications
• Per-channel A-Law/-Law Conversions for voice
• 96 separate Pseudo-random Bit Sequence (PRBS) test circuits; one per stream. This provides an integrated Bit Error Rate (BER) test capability to facilitate data path integrity checking

The ZL50070 has two major modes of operation: Connection Mode (normal) and Message Mode. In Connection Mode, data bytes received at the TDM inputs are switched to timeslots in the output data streams, with mapping controlled by the Connection Memories. Using Zarlink's Message Mode capability, microprocessor data can be broadcast to the output data streams on a per-channel basis. This feature is useful for transferring control and status information to external circuits or other TDM devices.

A non-multiplexed microprocessor port provides access to the internal Data Memory, Connection Memory and Control Registers used to program ZL50070 options. The port is configurable to interface with either Motorola or Intel-type microprocessors and is selectable to be either 32 bit or 16 bit.

The mandatory requirements of IEEE 1149.1 standard are supported via the dedicated Test Access Port.