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ZL50030

Features: • 4,096 x 2,048 blocking switching between backplane and local streams• 1,024 x 1,024 non-blocking switching between local streams• 2,048 x 2,048 non-blocking switching between backplane streams• Rate conversion between backplane and local streams• Backplane...

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ZL50030: Features: • 4,096 x 2,048 blocking switching between backplane and local streams• 1,024 x 1,024 non-blocking switching between local streams• 2,048 x 2,048 non-blocking switching b...

ZL50030 Data Sheet

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Part Number:
ZL50030
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• 4,096 x 2,048 blocking switching between backplane and local streams
• 1,024 x 1,024 non-blocking switching between local streams
• 2,048 x 2,048 non-blocking switching between backplane streams
• Rate conversion between backplane and local streams
• Backplane interface accepts data rates of 8.192 Mbps or 16.384 Mbps
• Local interface accepts data rates of 2.048 Mbps, 4.096 Mbps or 8.192 Mbps on a per group basis
• Meets all the key H.110 mandatory signal requirements including timing
• Per-channel variable or constant throughput delay
• Per-stream input delay, programmable for local streams on a per bit basis
• Per-stream output advancement, programmable for backplane and local streams
• Per-channel direction control for backplane streams and local streams
• Per-channel message mode for backplane and local streams
• Per-channel high impedance output control for backplane and local streams
• Compatible to Stratum 4 Enhanced clock switching standard
• Integrated PLL conforms to Telcordia GR-1244- CORE Stratum 4 Enhanced switching standard
- Holdover Mode with holdover frequency stability of 0.07 ppm
- Jitter attenuation from 1.52 Hz.
- Time interval error (TIE) correction
- Master and Slave mode operation
• Non-multiplexed microprocessor interface
• Connection memory block-programming for fast device initialization
• Pseudo-Random Binary Sequence (PRBS) pattern generation and testing for backplane and local streams
• Conforms to the mandatory requirements of the IEEE-1149.1 (JTAG) standard
• 3.3 V operation with 5 V tolerant inputs and I/O's
• 5 V tolerant PCI driver on CT-Bus I/O's


Application

• Carrier-grade VoIP Gateways
• IP-PBX and PABX
• Intregrated Access Devices
• Access Servers
• CTI Applications/CompactPCI® Platforms
• H.110, H.100, ST-BUS and proprietary Backplane Applications


Specifications

  Parameter Symbol Min Max Units
1 Supply Voltage VDD -0.5 5.0 V
2 BSTio Bias Voltage VDD5V -0.5 7.0 V
3 Input Voltage VI -0.5 VDD + 0.5 V
4 Output Voltage Vo -0.5 VDD + 0.5 V
5 Package power dissipation PD   2 W
6 Storage temperature TS -55 150

* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.


Description

The ZL50030 Digital Switch provides switching capacities of 4,096 x 2,048 channels between backplane and local streams, 1,024 x 1,024 channels among local streams, and 2,048 x 2,048 channels among backplane streams. The local connected serial inputs and outputs have 32, 64 and 128 64 kbps channels per frame with data rates of 2.048, 4.096 and 8.192 Mbps respectively. The backplane connected serial inputs and outputs have 128 and 256 64 kbps channels per frame with data rates of 8.192 and 16.384 Mbps respectively.

The ZL50030 has features that are programmable on a per-stream or a per-channel basis including message mode, input delay offset, output advancement offset, and direction control.




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