Z86E47

The Z86E47 Digital Television Controller (DTC) introduce a new level of sophistication to single-chip architecture.
The Z86E47 is a member of the Z8 single-chip microcontroller family with 16 Kbytes of OTP (One-Time- Programmable) ROM and 236 bytes of RAM. The device is housed in a 64-pin DIP package, and is CMOS compatible.
The part features ROMs for program storage and character generation. The Z86E47 microcontroller may be
used in prototyping, low volume applications or where code development is required. Zilog's DTC offers fast
execution, efficient use of memory, sophisticated interrupts, input/output bit manipulation capabilities, and easy
hardware/software system expansion along with low cost and low power consumption. The device provides an ideal performance and reliability solution for consumer and industrial television applications.

The Z86E47 architecture utilizes Zilog's advanced Superintegration™ design methodology. The device has an 8-bit internal data path controlled by a Z8 microcontroller, On-Screen Display (OSD) logic circuits/Pulse Width Modulators
(PWM). On-chip peripherals include five register/ memory mapped I/O ports (Ports 2, 3, 4, 5, and 6), Interrupt control logic (1 software, 2 external and 3 internal interrupts) and a standby mode recovery input port (Port 3, pin
P30).

The OSD control circuits support eight rows by 20 columns for 128 kinds of characters. The character color is specified by row. One of the eight rows is assigned to show two kinds of colors for bar type displays such as volume control. The OSD is capable of displaying high resolution (11x15 dot pattern) characters.

A 14-bit PWM port provides enough voltage resolution for a voltage synthesizer tuning system. Seven 6-bit PWM
ports are used for controlling audio signal level. Five 8-bit PWM ports are used to vary picture levels.

DTC applications demand powerful I/O capabilities. The Z86E47 fulfills this with 35 I/O pins dedicated to input and
output. These lines are grouped into five ports, and are configurable under software control to provide timing,
status signals, parallel I/O and an address/data bus for interfacing to external memory.

There are three basic address spaces available to support this wide range of configurations: Program Memory, Register File and Data Memory. The Data Memory address space contains a number of control registers for the
PWMs, OSD, and I/O Ports 4, 5, and 6. Specifically, there are 13 PWM and eight OSD control registers mapped into
the external memory address space. Three I/O registers for Ports 4, 5, and 6 reside in data memory space as well.
The Register File is composed of 236 bytes of general purpose register, two I/O Port registers and 15 control and
status registers.

To unburden the program from coping with the real-time problems such as counting/timing and data communication, the DTC's offer two on-chip counter/timers with a large number of user selectable modes (see block diagram).

Note: All Signals with a preceding front slash, "/", are active Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is
active Low, only).