Z86127

The Z86127 Low-Cost Digital Television Controller (LDTC) introduces a new level of sophistication to single-chip architecture. The Z86127 is a member of the Z8® singlechip microcontroller family with 8 Kbytes of ROM and 236 bytes of RAM. The device is housed in a 64-pin DIP package, in which only 52 are active, and are CMOS compatible. The LDTC offers mask programmed ROM which enables the Z8 microcontroller to be used in a high volume production application device embedded with a custom program (customer supplied program).

Zilog's LDTC offers fast execution, efficient use of memory, sophisticated interrupts, input/output bit manipulation capabilities, and easy hardware/software system expansion along with low cost and low power consumption. The Z86127 device provides an ideal performance and reliability solution for consumer and industrial television applications.

The Z86127 architecture is characterized by utilizing Zilog's advanced Superintegration™ design methodology. The device has an 8-bit internal data path controlled by a Z8 microcontroller and On Screen Display (OSD) logic circuits/ Pulse Width Modulators (PWM). On-chip peripherals include two register mapped I/O ports (Ports 2 and Port 3), interrupt control logic (one software, two external and three internal interrupts) and a standby mode recovery input port (Port 3, pin P30).

The OSD control circuits support 8 rows by 20 columns of characters. The character color of Z86127 is specified by row. One of the eight rows is assigned to show two kinds of colors for bar type displays such as volume control. The OSD is capable of displaying either low resolution (5x7 dot pattern) or high resolution (11x15 dot pattern) characters. The Z86C97 currently supports high resolution characters only. A 14-bit PWM port provides enough voltage resolution for a voltage synthesizer tuning system. Three 6-bit PWM ports are used for controlling audio signal levels. Five 8-bit PWM ports are used to vary picture levels.

The LDTC applications demand powerful I/O capabilities. The Z86127 fulfills this with 27 I/O pins dedicated to input and output. These lines are grouped into four ports, and are configurable under software control to provide timing, status signals, parallel I/O and an address/data bus for interfacing to external memory.

There are three basic address spaces available to support this wide range of configurations of Z86127: Program Memory, Video RAM, and R gister File. The Register File is composed of 236 bytes of general purpose registers, two I/O Port registers, 15 control and status registers and three reserved registers.To unburden the program from coping with the real-time problems such as counting/timing and data communication, the LDTC offers two on-chip counter/timers with a large number of user selectable modes (Functional Block Diagram).