Z5380

Features: · Pin Compatible with the Industry Standard 5380· 40-Pin DIP or 44-Pin PLCC Package Styles· Low-Power CMOS· Asynchronous Interface (Supports 1.5 MB/s)· Direct SCSI Bus Interface with On-Board 48 mA Drivers· Supports Target and Initiator Roles· Arbitration Support· DMA or Programmed I/O D...

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Z5380 Picture
SeekIC No. : 004550213 Detail

Z5380: Features: · Pin Compatible with the Industry Standard 5380· 40-Pin DIP or 44-Pin PLCC Package Styles· Low-Power CMOS· Asynchronous Interface (Supports 1.5 MB/s)· Direct SCSI Bus Interface with On-Bo...

floor Price/Ceiling Price

Part Number:
Z5380
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

· Pin Compatible with the Industry Standard 5380
· 40-Pin DIP or 44-Pin PLCC Package Styles
· Low-Power CMOS
· Asynchronous Interface (Supports 1.5 MB/s)
· Direct SCSI Bus Interface with On-Board 48 mA Drivers
· Supports Target and Initiator Roles
· Arbitration Support
· DMA or Programmed I/O Data Transfers
· Supports Normal or Block Mode DMA
· Memory or I/O Mapped CPU Interface



Pinout

  Connection Diagram


Specifications

Voltages on all pins
with respect to GND................................. 0.3V to +7.0V
Operating Ambient Temperature ................................... †
Storage Temperature ............................ 65to +150



Description

The Z5380 SCSI (Small Computer System Interface) controller is designed to implement the SCSI protocol as defined by the ANSI X3.131-1986 standard, and is fully compatible with the industry standard 5380. It is capable of operating both as a Target and as an Initiator. Special high-current open-drain outputs enable the Z5380 to directly interface to, and drive, the SCSI bus. The Z5380 hasthe necessary interface hook-ups which allows the system CPU to communicate with it like any other peripheral device. The CPU can read from, or write to, the SCSI registers which are addressed as standard or memorymapped I/Os (Figure 1).

The Z5380 increases the system performance by minimizing he CPU intervention in DMA operations which the SCSI ontrols. The CPU is interrupted by the SCSI when it etects a bus condition that requires attention. It also upports arbitration and reselection. The Z5380 has the roper hand-shake signals to support normal and block ode DMA operations with most DMA controllers available Figure 2).




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