Features: SpecificationsDescriptionThe YVZ152B has the following features including Deinterleave, error detection and correction functions for the CD subcode R-W;Interface with the subcode output comforming to EIAJ from the CD signal processing LSI;Interface with the digital audio interface receiv...
YVZ152B: Features: SpecificationsDescriptionThe YVZ152B has the following features including Deinterleave, error detection and correction functions for the CD subcode R-W;Interface with the subcode output co...
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The YVZ152B has the following features including Deinterleave, error detection and correction functions for the CD subcode R-W;Interface with the subcode output comforming to EIAJ from the CD signal processing LSI;Interface with the digital audio interface receiver of the YM3623B and YM3436D;Control over the drawing process and display of the CD graphics;Linear RGB output by the built-in DAC.
The YVZ152B (CDGD) is an LSI with the functions necessary for the CD graphics player incorporated in one chip. They are such functions as to deinterleave, detect and correct errors of subcodes R-W,and process the graphic command. By using the subcode output from the CD signal processing LSI such as YM7121C (SPCS), simple attachment of the 256K bit DRAM and composite video encoder will allow to decode the CD graphics. As the graphic command is read and written by the microprocessor, it can be used for the subcode system other than the CD graphics.In EIAJ(1), YM3623 or YM3436 mode, when the sub-code block synchronous signals have occurred at discontinuous positions due to a scratch or some other reason, they are neglected. Also, when they have failed to occur at expected positions, they are interpolated for protection.The display position in the vertical direction is shifted up or down by 2-line units.A 2's complement with DAV2 as a sign bit is used. When in minus, an upward shift occurs and when in plus, a downward shift.
A superimpose timing is output through the YVZ152B YS terminal to execute superimpose. In this case, as synchronization to the external clock is necessary, the clock generated at the PLL is input to the XI terminal. Also, it is so designed that the internal vertical synchronous counter is reset at the fall of the /VRESET terminal so that the vertical synchronous timing is also externally synchronized.The subcode, after being received, undergoes the deinterleave and error detectionlcorrection operations and is transferred to the drawing processing block in packs. The command of an uncorrectable pack is not executed. Listed below are the commands that are interpreted and executed.