DescriptionThe YM3436D receives and demodulates the digital audio interface format signals, conforming with the EIAJ CP-340 or AES/EBU. Comparing to the YM3623B(DIR), external synchronization and error processing functions are further improved and it is made applicable more widely by using the cha...
YM3436D: DescriptionThe YM3436D receives and demodulates the digital audio interface format signals, conforming with the EIAJ CP-340 or AES/EBU. Comparing to the YM3623B(DIR), external synchronization and er...
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The YM3436D receives and demodulates the digital audio interface format signals, conforming with the EIAJ CP-340 or AES/EBU. Comparing to the YM3623B(DIR), external synchronization and error processing functions are further improved and it is made applicable more widely by using the channel status and user data outputs.
Features of the YM3436D are:(1)capable to accept the AlD input and asynchronous input as well as the digital audio interface signal input; (2)as a phase comparator and VCO are built in, a PLL circuit synchronized with the external input can be formed easily Ifs=32kHz--48kHz); (3)capable to demodulate the digital audio interface signal and output 24-bit 2-channel audio data and control data; (4)as a clock master, it supplies various kinds of clock signals to the other LSIs; (5)the built-in asynchronous buffer enables the output phase to be retained even on clock switching. Also capable of easy interface between the equipments where full synchronization is impossible such as when several digital audio interface signals are received simultaneously; (6)detects transmission errors and reception errors and executes error processing of data hold and muting; (7)executes decoding and output of the validity flag, channel status, user data as control data.especially, the channel status conforms with both consumer use and professional use formats.also, information can be read out microprocessor interface; (8)5V power supply, si-gate CMOS, 44-pin QFP.
The absolute maximum ratings of the YM3436D can be summarized as:(1)power supply voltage:-0.3 to 7.0 V;(2)storage temperature:-50 to +125;(3)input voltage:Vss-0.3 to Vdd=0.5 V;(4)operating temperature:0 to +70.Any error that has occurred in the transmission circuit and reception stage is detected by the lock condition of the PLL and pality check. When an error has occurred, the audio data is held for L and R respectively up to 1 sample. If it is more than that, L and R are muted simultaneously. Muting is not cancelled till 4096 samples are processed without any error for both L and R channels. The ERR terminal output becomes 'H'when the PLL is unlocked and a parity error has occurred. YM3436D is possible to monitor the DAIF signal state even when an auxiliary input of the AID or such is selected.