Features: •Two independent, full duplex DS1 Tx and Rx Framer/LIUs•Two 512-bit (two-frame) elastic store, PCM frame slip buffers (FIFO) on TX and Rx provide up to 8.192 MHz asynchronous back plane connections with jitter and wander attenuation•Supports input PCM and signaling data...
XRT86VL32: Features: •Two independent, full duplex DS1 Tx and Rx Framer/LIUs•Two 512-bit (two-frame) elastic store, PCM frame slip buffers (FIFO) on TX and Rx provide up to 8.192 MHz asynchronous b...
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Specifications | |
No. ofCH | 2 |
DataRate(s) | T1/E1/J1 |
Clk Rec | Yes |
SH/LH | S/L |
Temp.Range | Ind. |
OpPwr Sup/Max Cur | 3.3V +/-5% |
Pkgs | BGA-225 |
The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R³ Technology™ (Reconfigurable, Relayless Redundancy). The physical interface is optimized with internal impedance, and with the patented pad structure, The XRT86VL32 provides protection form power failures and hot swapping.
The XRT86VL32 contains an integral DS1/E1/J1 framer and LIU which provide DS1/E1/J1 framing and error accumulation in accordance with ANSI/ITU_T specifications. Each framer has its own framing synchronizer and transmit-receive slip buffers. The slip buffers can be independently enabled or disabled as required and can be configured to frame the common DS1/E1/J1 signal formats. It also contains a transmit and overhead data input port for each channel, that permits data line terminal equipment direct access to the out-bound T1/E1/J1 frames. In the receive direction, it has complementary blocks to the transmit path.
The device is compliant with all T1/E1/J1 specifications including ANSI T1/E1.107-1998, ANSI T1/E1. 403-1995, ANSI T1/E1. 231-1993, ANSI T1/E1. 408-1990, AT&T TR 62411 (12-90) TR540616, and ITU G. 703, G. 704, G. 706, and G. 733. Also, AT&T Pub. 43801, and ETS 300 011, 300 233, JT G. 703, JT G. 704, JT G. 706, I. 431.
R³ Technology™ Overview
Exar's breakthrough R³ Technology™ delivers key benefits to customers designing T1/E1/J1 interface cards. The devices are Reconfigurable with integrated termination supporting all common T1/E1/J1 line impedances enabling customers to build one board with a single bill-of-materials. Now, final device configuration can be done just prior to line-card installation. This unique capability prevents customers from having to unnecessarily stockpile an inventory of all configurations to accommodate changing market conditions. Also, the series employs Relayless Redundancy eliminating the need for external relays for 1:1 and 1+1 applications by establishing a back-up channel that can be brought on-line in the event of failure. The first application of this technology was multi-channel long-haul, short-haul (1, 4, and 8-channel) Line Interface Units (LIUs) that are already designed in at key customers in the targeted markets of Multi-Service Provisioning Platforms (MSPPs), access devices, media gateways, routers, and frame relay access devices.