Features: •Provides mapping of up to 28 T1 streams as Asynchronous VT1.5 into an STS-1 SPE or TU-11 tributary unit into an STM-1/VC-3 or TUG-3 from STM-1/VC-4•Supports 28 T1 streams M13 multiplexed into a serial DS3•Supports 21 E1 streams M13 multiplexed into a serial DS3 (compli...
XRT86SH328: Features: •Provides mapping of up to 28 T1 streams as Asynchronous VT1.5 into an STS-1 SPE or TU-11 tributary unit into an STM-1/VC-3 or TUG-3 from STM-1/VC-4•Supports 28 T1 streams M13 ...
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Specifications | |
DataRate(s) | DS1, E1, 1xSTS-1 |
Protocols | SONET/SDH |
Bus I/F | 19MHz |
SystemBus I/F | Parallel |
Pwr Sup | 3.3V/1.8V |
Pkgs | BGA-568 |
The XRT86SH328 is an integrated VT/TU Mapper with 28 port T1/E1 Line Interface Units. The XRT86SH328 contains integrated DS1/E1/J1 Framers for performance monitoring.
The XRT86SH328 processes the Section, Line and Path overhead in the SONET/SDH data-stream. The processing of path overhead bytes within the STS-1s or TUG-3s include 64 bytes (of buffer) for storing the (Section Trace and Path Trace) messages. Path Overhead bytes can be accessed either by on-chip registers or a Serial Output Port.
Each of the 28 T1 or E1 Channels use an internal De-Synchronizer circuit with an internal pointer leak algorithm. This removes the jitter due to mapping and pointer adjustments from the T1 or E1 signals that are de-mapped from the incoming SONET/SDH data-stream. These De-Synchronizer circuits do not need any external clock references for its operation. The Transmit Blocks permit flexible insertion of TOH and POH bytes via both Hardware and Software control. The Receive Blocks of XRT86SH328 receive a SONET STS-1 signals or an SDH STM-1 signal and performs the necessary Transport and Path Overhead Processing.A PRBS Pattern Generator and Receiver is implemented within each of the 28 T1/E1 channels in order to implement and measure Bit-Error performance.A general purpose Microprocessor Interface is included for control, configuration and monitoring.