Features: • Fully integrated single-channel long-haul and shorthaul transceiver for E1,T1 or J1 applications.• Adaptive Receive Equalizer for cable attenuation of up to 45dB for T1 and 43dB for E1.• Programmable Transmit Pulse Shaper for E1,T1 or J1 short-haul interfaces.•...
XRT83L30: Features: • Fully integrated single-channel long-haul and shorthaul transceiver for E1,T1 or J1 applications.• Adaptive Receive Equalizer for cable attenuation of up to 45dB for T1 and...
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Clock Synthesizer / Jitter Cleaner 3.3V-5V 0.05UI temp -45 to 85C
• Fully integrated single-channel long-haul and shorthaul transceiver for E1,T1 or J1 applications.
• Adaptive Receive Equalizer for cable attenuation of up to 45dB for T1 and 43dB for E1.
• Programmable Transmit Pulse Shaper for E1,T1 or J1 short-haul interfaces.
• Five fixed transmit pulse settings for T1 short-haul applications plus a fully programmable waveform generator for transmit output pulse shaping.
• Programmable Transmit Line Build-Outs (LBO) for T1 long-haul application from 0dB to -22.5dB in three 7.5dB steps.
• Tri-State transmit output and receive input capability for redundancy applications
• Selectable receiver sensitivity from 0 to 36dB or 0 to 45dB cable loss for T1 @772kHz and 0 to 43dB for E1 @1024kHz.
• High receiver interference immunity
• Receive monitor mode handles 0 to 29dB resistive attenuation along with 0 to 6dB of cable attenuation for both T1 and E1 modes.
• Supports 75W and 120W (E1), 100W (T1) and 110W (J1) applications.
• Internal and external impedance matching for 75W,100W, 110W and 120W.
• Transmit return loss meets or exceeds ETSI 300 166 standard
• On-chip digital clock recovery circuit for high input jitter tolerance
• Crystal-less digital jitter attenuator with 32-bit or 64- bit FIFO Selectable either in transmit or receive path
• On-chip frequency multiplier generates T1 or E1 Master clocks from variety of external clock sources
• On-chip transmit short-circuit protection and limiting, and driver fail monitor output (DMO)
• Receive loss of signal (RLOS) output
• On-chip HDB3/B8ZS/AMI encoder/decoder
• QRSS pattern generation and detection for testing and monitoring
• Error and Bipolar Violation Insertion and Detection
• Receiver Line Attenuation Indication Output in 1dB steps
• Network Loop-Code Detection for automatic Loop- Back Activation/Deactivation
• Transmit All Ones (TAOS) and In-Band Network Loop Up and Down code generators
• Supports Analog, Remote, Digital and Dual Loop- Back Modes
• Meets or exceeds T1 and E1 short-haul and longhaul network access specifications in ITU G.703,
Specifications | |
No. ofCH | 1 |
DataRate(s) | T1/E1/J1 |
Clk Rec | Yes |
SH/LH | S/L |
Temp.Range | Ind. |
OpPwr Sup/Max Cur | 3.3V ±5%, TBD |
Pkgs | PQFP-64 |