Features: `Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L04A`Meets E3/DS3/STS-1 Jitter Tolerance Requirements`Contains a 4-Wire Microprocessor Serial Interface`Full Loop-Back Capability`Transmit and Receive Power Down Modes`Full Redundancy Support`U...
XRT73LC04A: Features: `Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L04A`Meets E3/DS3/STS-1 Jitter Tolerance Requirements`Contains a 4-Wire Microprocessor Serial...
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Specifications | |
No. ofCH | 4 |
DataRate(s) | DS3, E3, STS-1 |
Clk Rec | Yes |
SH/LH | n/a |
Temp.Range | Ind. |
OpPwr Sup/Max Cur | 3V |
Pkgs | TQFP-144 |
Storage Temperature Operating Temperature Supply Voltage Range Theta-JA Theta-JC |
- 65 to + 150 - 40 to + 85 -0.5V to +3.465V 24/W 5.5/W |
NOTE: The XRT73LC04A is assembled in a thermally enhanced package with an integral Copper Heat Slug. The Heat Slug is solder plated and is exposed on the bottom of the package and is electrically connected to the internal Ground connections of the device. This Heat Slug can be soldered to the mounting board if desired, but must be electrically isolated from any VDD connections.
In the receive direction, the XRT73LC04A performs equalization on incoming signals, performs Clock Recovery, decodes data from either B3ZS or HDB3 format, converts the receive data into TTL/CMOS format, checks for LOS or LOL conditions and detects and declares the occurrence of Line Code Violations.
The XRT73LC04A, 4-Channel, DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L04A and consists of four independent line transmitters and receivers integrated on a single chip designed for DS3, E3 or SONET STS-1 applications.
Each channel of the XRT73LC04A can be configured to support the E3 (34.368 Mbps), DS3 (44.736 Mbps) or the SONET STS-1 (51.84 Mbps) rates. Each channel can be configured to operate in a mode/data rate that is independent of the other channels.In the transmit direction, each channel encodes input data to either B3ZS (DS3/STS-1) or HDB3 (E3) for-mat and converts the data into the appropriate pulse shapes for transmission over coaxial cable via a 1:1 transformer.
In the receive direction, the XRT73LC04A performs equalization on incoming signals, performs Clock Recovery, decodes data from either B3ZS or HDB3 for-mat, converts the receive data into TTL/CMOS for-mat, checks for LOS or LOL conditions and detects and declares the occurrence of Line Code Violations.