Features: • Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L00A• Meets E3/DS3/STS-1 Jitter Tolerance Requirements• Full Loop-Back Capability• Transmit and Receive Power Down Modes• Full Redundancy Support• Contains ...
XRT73LC00A: Features: • Incorporates an improved Timing Recovery circuit and is pin and functional compatible to XRT73L00A• Meets E3/DS3/STS-1 Jitter Tolerance Requirements• Full Loop-Back Cap...
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POWER SUPPLY | -0.5 TO +3.465V |
STORAGE TEMPERATURE | -65 TO 150 |
INPUT VOLTAGE AT ANY PIN | -0.5V TO 5.0V |
POWER DISSIPATION TQFP PACKAGE | 1.2W |
INPUT CURRENT AT ANY PIN | +100MA |
ESD RATING (MIL-STD-883, M-3015) | 1500V |
Specifications | |
No. ofCH | 1 |
DataRate(s) | DS3, E3, STS-1 |
Clk Rec | Yes |
SH/LH | n/a |
Temp.Range | Ind. |
OpPwr Sup/Max Cur | 3V ±5% |
Pkgs | TQFP-44 |
The XRT73LC00A DS3/E3/STS-1 Line Interface Unit is a low power CMOS version of the XRT73L00A and consists of a line transmitter and receiver integrated on a single chip and is designed for DS3, E3 or SONET STS-1 applications.
XRT73LC00A can be configured to support the E3 (34.368 Mbps), DS3 (44.736 Mbps) or the SONET STS-1 (51.84 Mbps) rates.
In the transmit direction, the XRT73LC00A encodes input data to either B3ZS (for DS3/STS-1 applications) or HDB3 (for E3 applications) format and converts the data into the appropriate pulse shapes for transmission over coaxial cable via a 1:1 transformer.
In the receive direction the XRT73LC00A performs equalization on incoming signals, performs Clock Recovery,decodes data from either B3ZS or HDB3 format,converts the receive data into TTL/CMOS format, checks for LOS or LOL conditions and detects and declares the occurrence of line code violations.
The XRT73LC00A also contains a 4-Wire Microprocessor Serial Interface for accessing the on-chip Command registers.