Features: RECEIVER:• On chip Clock and Data Recovery circuit for high input jitter tolerance.• Meets the jitter tolerance requirements as specified in ITU-T G.823_1993 for E3 and Telcordia GR-499- CORE for DS3 applications.• Detects and Clears LOS as per G.775.• Receiver Mo...
XRT73L02M: Features: RECEIVER:• On chip Clock and Data Recovery circuit for high input jitter tolerance.• Meets the jitter tolerance requirements as specified in ITU-T G.823_1993 for E3 and Telcord...
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SYMBOL | PARAMETER | MIN | MAX | UNITS | COMMENTS |
VDD | Supply Voltage | -0.5 | 6.0 | V | Note 1 |
VIN | Input Voltage at any Pin | -0.5 | 5+0.5 | V | Note 1 |
IIN | Input current at any pin | 100 | mA | Note 1 | |
STEMP | Storage Temperature | -65 | 150 | Note 1 | |
ATEMP | Ambient Operating Temperature | -40 | 85 | linear air flow 0ft/min | |
ThetaJA | Thermal Resistance | 35 | /W | linear air flow 0ft/min | |
ThetaJC | 6 | /W | |||
MLEVL | Exposure to Moisture | 5 | level | EIA/JEDEC JESD22-A112-A | |
ESD | ESD Rating | 2000 | V | Note 2 |
Specifications | |
No. ofCH | 2 |
DataRate(s) | DS3, E3, STS-1 |
Clk Rec | Yes |
SH/LH | n/a |
Temp.Range | Ind. |
OpPwr Sup/Max Cur | 3V ±5% |
Pkgs | TQFP-80 |
The XRT73L02M is a two-channel fully integrated Line Interface Unit (LIU) for E3/DS3/STS-1 applications. It incorporates independent Receivers, Transmitters in a single 100 pin TQFP package.
The XRT73L02M can be configured to operate in either E3 (34.368 MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz) modes.The transmitter can be turned off or tri-stated for redundancy support and for conserving power.
The XRT73L02M's differential receiver provides high noise interference margin and is able to receive the data over 1000 feet of cable or with up to 12 dB of cable attenuation.
The XRT73L02M provides both Serial Microprocessor Interface as well as Hardware mode for programming and control.
The XRT73L02M supports local,remote and digital loop-backs. The XRT73L02M also contains an onboard Pseudo Random Binary Sequence (PRBS) generator and detector with the ability to insert and detect single bit error.