Features: • Transmits, Receives and Processes data in the DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3-ITU-T G.832 Framing Formats.• 6 Channel HDLC Controller - Tx and Rx• Interfaces to all Popular Microprocessors• Integrated Framer Performance Monitor• Available ...
XRT72L54: Features: • Transmits, Receives and Processes data in the DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3-ITU-T G.832 Framing Formats.• 6 Channel HDLC Controller - Tx and Rx• Inte...
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Specifications | |
No. ofCH | 4 |
DataRate(s) | DS3, E3 |
Temp.Range | Ind. |
OpPwr Sup/Max Cur | 3V ±5% |
Pkgs | PBGA-272 |
The XRT72L54, 4 Channel DS3/E3 Framer IC is designed to accept "User Data" from the Terminal Equipment and insert this data into the "payload" bitfields within an "outbound" DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an "inbound" DS3/E3 Data Stream (from the Remote Terminal Equipment) and extract out the "User Data". The XRT72L54 DS3/E3 Framer device is designed to support full-duplex data flow between Terminal Equipment and an LIU (Line Interface Unit) IC. The Framer Device will transmit, receive and process data in the DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3- ITU-T G.832 Framing Formats.
The XRT72L54 DS3/E3 Framer IC consists of Four Transmit sections, Four Receiver sections, Four Performance Monitor Sections and a Microprocessor interface. The Transmit Sections, include a Transmit Payload Data Input Interface, a Transmit Overhead data Input Interface Section, a Transmit HDLC Controller, a TransmitDS3/E3 Framer block and a Transmit LIU Interface Block which permits the Terminal Equipment to transmit data to a remote terminal.
The Receive Sections, consist of a Receive LIU Interface, a Receive DS3/E3 Framer, a Receive HDLC Controller, a Receive Payload Data Output Interface, and a Receive Overhead Data Interface which allows the local terminal equipment to receive data from remote terminal equipment.
The Microprocessor Interface is used to configure the Framer IC in different operating modes and monitor the performance of the Framer.
The Performance Monitor Sections consist of a large number of "Reset-upon-Read" and "Read-Only" registers that contain cumulative and "one-second" statistics that reflect the performance/health of the Four channels of the Framer IC/system.