Specifications Specifications No. ofCH 1 DataRate(s) DS3, E3 Temp.Range Ind. OpPwr Sup/Max Cur 3V ±5% Pkgs PQFP-100Description Innovative silicon solutions are a hallmark of Exar's products for the communications markets. Exar offers a full line of multi-channel (1, 2, 3,...
XRT72L50: Specifications Specifications No. ofCH 1 DataRate(s) DS3, E3 Temp.Range Ind. OpPwr Sup/Max Cur 3V ±5% Pkgs PQFP-100Description Innovative silicon solutions are a hallmark o...
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Specifications | |
No. ofCH | 1 |
DataRate(s) | DS3, E3 |
Temp.Range | Ind. |
OpPwr Sup/Max Cur | 3V ±5% |
Pkgs | PQFP-100 |
Innovative silicon solutions are a hallmark of Exar's products for the communications markets. Exar offers a full line of multi-channel (1, 2, 3, 4, 6, & 8) framers for DS3/E3 network access applications including network interface units, CSU/DSU equipment, PCM test equipment, fiber optic terminals, and frame relay equipment.
These XRT72L50 access control devices meld seamlessly with Exar's industry proven physical-interface components (transceivers and jitter attenuators) offering designers maximum integration and shortened time-to-market. Whatever your design requirement, Exar is the clear choice.
Designers have a wide range of Exar framer options that expand their ability to deliver complete system solutions. Devices include the XRT72L50 (single-channel), XRT72L52 (dual-channel), XRT72L53 (triple-channel), XRT72L54 (four-channel), XRT72L56 (six-channel), and the XRT72L58 (eight-channel) products.
Each of the devices contain individual HDLC controllers for processing transmit and receive channel payloads. This provides designers with the entire link layer for a frame relay access device in a single-chip and achieve better overall payload management. All devices support full-duplex data flow between the terminal equipment and a transceiver. In addition, they interface with all popular microprocessors.
The XRT72L50 will frame data in all standard DS3 and E3 formats: DS3 C-bit parity, DS3 M13, E3 ITU-T G.751 and E3 ITU-T G.832. Also, the devices have a performance monitoring section where a large number of "Reset-upon-Read" and "Read-Only" registers will contain cumulative and "one-second" statistics reflecting the performance and health of the overall IC system.