XRT71D04

Features: • Meets the E3/DS3/STS-1 jitter requirements• No external components required• Compliant with jitter transfer template outlined in ITU G.751, G.752, G.755, GR-499-CORE,1995 GR-253-CORE standards• Meets output jitter requirement as specified by ETSI TBR24• Me...

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SeekIC No. : 004549433 Detail

XRT71D04: Features: • Meets the E3/DS3/STS-1 jitter requirements• No external components required• Compliant with jitter transfer template outlined in ITU G.751, G.752, G.755, GR-499-CORE,19...

floor Price/Ceiling Price

Part Number:
XRT71D04
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

• Meets the E3/DS3/STS-1 jitter requirements
• No external components required
• Compliant with jitter transfer template outlined in ITU G.751, G.752, G.755, GR-499-CORE,1995 GR-253-CORE standards
• Meets output jitter requirement as specified by ETSI TBR24
• Meets the Jitter and Wander specificationsdescribed in T1.105.03b,GR-253 and GR-499 standards
• Selectable buffer size of 16 and 32 bits
• Jitter attenuator can be disabled
• Available in a 80 pin TQFP package
• Single 3.3V or 5.0V supply.
• Operates over - 40 to 85 temperature range.






Application

• E3/DS3 Access Equipment
• STS-SPE to DS3 Mapper
• DSLAMs





Pinout

  Connection Diagram




Specifications

Specifications
No. ofCH 4
DataRate(s) DS3, E3, STS-1
Clk Rec No
SH/LH n/a
Temp.Range Ind.
OpPwr Sup/Max Cur 3V, 5V, ±5%
Pkgs TQFP-80


Specifications
No. ofCH 4
DataRate(s) DS3, E3, STS-1
Clk Rec No
SH/LH n/a
Temp.Range Ind.
OpPwr Sup/Max Cur 3V, 5V, ±5%
Pkgs TQFP-80


Supply Range ..................-0.5 V to + 6.0 V
ESD Rating ................> 2000 V on all pins
Operating Temperature .....-40 to +85
Storage Temperature .....-65 to + 150





Description



Data transmission accuracy requires sending and receiving clean, error-free data. Jitter is caused by many factors including cross-talk noise, line interface/signal distortion, or even an imperfect timing recovery circuit. At every connection point (node) in a WAN environment, equipment and peripheral devices can cause new errors to be introduced into transmitted data. For precise data transmission, jitter must be reduced.

Exar has a full line of single, and multi-channel jitter attenuator solutions that match, or outperform, other methods, and are much easier to deploy at a lower cost. The XRT71D00, the industry's first jitter attenuator, is a fully integrated single-chip device for DS3/E3 applications. Complementing this device are the XRT71D03 (three-channel), and XRT73D04 (four-channel) parts, which like the XRT71D00, are designed to attenuate the jitter from the incoming clock and data signals. The parts are designed for seamless integration with EXAR's Line Interface Units (LIUs), and access control products enabling designers to implement a complete solution from a single source.

The XRT71D00, XRT71D03 and XRT71D04 meet the European Telecommunications Standards Institute (ETSI), technical committee draft standards TBR-24 for digital structured and unstructured leased lines. The Bellcore GR-499, and GR-253, require that terminal equipment, which derives its timing from the received signal at the input port, must not exceed specified output jitter levels. All three devices are compliant with the ANSI T1.105.03b 1997, and ITU G.751, G.752, G.755 standards.



The XRT71D04 is a four channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristic requirements specified in the ETSI TBR-24, Bellcore GR-499 and GR-253 standards.

In addition, the XRT71D04 also meets the Jitter and Wander specifications described in the ANSI T1.105.03b 1997, Bellcore GR-253 and GR-499 standards for Desynchronizing and Pointer adjustments in the DS3 to STS-SPE mapping applications.






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