XRT5894

Features:

· Compliant with ITU G.703 Pulse Mask Template for 2.048Mbps (E1) Rates
· Four Independent CEPT Transceivers
· Supports Differential Transformer Coupled Receivers and Transmitters
· On Chip Pulse Shaping for Both 75W and 120W Line Drivers
· Compliant with ITU G.775 LOS Declaration/Clearing Recommendation
· Optional User Selectable LOS Declaration/Clearing Delay
· Logical Inputs Accept either 3.3V or 5.0V Levels
· Ultra-Low Power Dissipation
· +3.3V or 5.0V Supply Operations
· Individual Transmit Channel Over Temperature Protection




Application

· SDH Multiplexer
· Digital Cross Connects




Pinout






Specifications

Storage Temperature . . . . . . . . . . . . -65 to +150
Operating Temperature . . . . . . . . . . -40 to +85
Supply Voltage . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
ESD Protection . . . . . . . . . . . . . . . . . . >1000V (HBM)

Specifications
No. ofCH	4
DataRate(s)	E1
Clk Rec	No
SH/LH	S
Temp.Range	Ind.
OpPwr Sup/Max Cur	3.3V, 5V ±5%, 210mA
Pkgs	TQFP-64

Description



The XRT5894 is an optimized four channel 3.3V line interface unit fabricated using low power CMOS technology. The device contains four independent E1 channels. Each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. The device requires transformer on both receiver and transmitter sides, and supports both balanced and unbalanced interfaces.

The XRT5894 offers two distinct modes of LOS detection. The first method, which does not require an external clock, provides an LOS output indication signal with thresholds and delay that comply with the ITU G.775 requirements. In the second mode, the user provides an external clock that increases the delay for LOS declaration and clearing. This feature provides the user with the flexibility to implement LOS specifications that require a delay greater than the G.775 requirements.