XRD64L44

V_DD to GND ..................................................+7.0V
V_RT & V_RB V_DD.......................... +0.5 to GND -0.5V
VIN VDD ....................................+0.5 to GND -0.5V
All Inputs V_DD ...........................+0.5 to GND -0.5V
All Outputs V_DD......................... +0.5 to GND -0.5V
Storage Temperature..................... -65 to 150
Lead Temperature (Soldering 10 seconds) ....300
Maximum Junction Temperature .....................150
Package Power Dissipation Ratings (T_A= +70)
SSOP.............................................._JA = 89.4/W
ESD......................................................... 2000V min 
Notes:
1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short transients outside the supplies of less than 100mA for less than 100ms.
3 VDD refers to AVDD and DVDD. GND refers to AGND and DGND

The XRD64L44 is two 10-bit, monolithic, 50 MSPS ADCs. Manufactured using a standard CMOS process, the XRD64L44 offers low power, low cost and excellent performance. The on-chip track-and-hold amplifier(T/H) and voltage reference (VREF) eliminate the need for external active components, requiring only an external ADC conversion clock for the application. The XRD64L44 analog input can be driven with ease due to the high input impedance of RIN = 25KOhms and CIN = 5pF.

The design architecture uses 17 time- interleaved 10-bit SAR ADCs in each converter to achieve high conversion rate of 50 MSPS minimum. In order to insure and maintain accurate 10-bit operation with respect to time and temperature, XRD64L44 incorporates an auto-calibration circuit which continuously adjusts and matches the offset and linearity of each ADC. This auto-calibration circuit is transparent to the user after the initial 3.4ms calibration (168,000 initial clock cycles).

The power dissipation is only 250mW at 50 MSPS and 225mW at 40 MSPS with +3.0V power supply.The digital output data is straight binary format, and the tri-state disable function is provided for common bus interface.

The XRD64L44 internal reference provides cost savings and simplifies the design/development. The output voltage of the internal reference is set by two external resistors. The internal reference can be disabled if an external reference is used for a power savings of 50mW.