XRD64L42

• 10-Bit Resolution
• Two Monolithic Complete 10-Bit ADCs
• 40 MSPS Conversion Rate
• On-Chip Track-and-Hold
• On-Chip Voltage Reference
• Low 5 pF Input Capacitance
• TTL/CMOS Outputs
• Tri-State Output Buffers
• Single +3.0V Power Supply Operation
• Low Power Dissipation: 200mW-typ @ 2.7V
• Power Down Mode Less Than 5mW
• 75dB Crosstalk (fin=1.0MHz)
• -40 to +85 Operation Temperature Range

V_DD to GND...............................................................+7.0V
V_RT & V_RB ......................................V_DD +0.5 to GND -0.5V
V_IN..................................................V_DD +0.5 to GND -0.5V
All Inputs .......................................V_DD +0.5 to GND -0.5V
All Outputs .....................................V_DD +0.5 to GND -0.5V
Storage Temperature.................................. -65 to 150
Lead Temperature (Soldering 10 seconds) ...............300
Maximum Junction Temperature................................ 150
Package Power Dissipation Ratings (T_A= +70)
TQFP.......................................................... _JA = 89.4/W
ESD ...................................................................2000V min

The XRD64L42 is two 10-bit, monolithic, 40 MSPS ADCs. Manufactured using a standard CMOS process, the XRD64L42 offers low power, low cost and excellent performance. The on-chip track-and-hold amplifier(T/H) and voltage reference (VREF) eliminate the need for external active components, requiring only an external ADC conversion clock for the application. The XRD64L42 analog input can be driven with ease due to the high input impedance.

The design architecture uses 17 time- interleaved 10-bit SAR ADCs in each converter to achieve high conversion rate of 40 MSPS minimum. In order to insure and maintain accurate 10-bit operation with respect to time and temperature, XRD64L42 incorporates an auto-calibration circuit which continuously adjusts and matches the offset and linearity of each ADC. This auto-calibration circuit is transparent to the user after the initial 3.4ms calibration (168,000 initial clock cycles).

The power dissipation is only 200mW at 40 MSPS with +2.7V power supply.

The digital output data is straight binary format, and the tri-state disable function is provided for common bus interface.

The XRD64L42 internal reference provides cost savings and simplifies the design/development. The output voltage of the internal reference is set by two external resistors. The internal reference can be disabled if an external reference is used for a power savings of 50mW.