Features: ·Pin to pin and functionally compatible to XR68C681 and SCC68692·Full duplex transmit and receive operation·8 bytes of transmit/receive FIFOs (XR68C92)·16 bytes of transmit/receive FIFOs (XR68C192)·Programmable character lengths (5, 6, 7, 8)·Parity, framing, and over run error detection·...
XR68C192: Features: ·Pin to pin and functionally compatible to XR68C681 and SCC68692·Full duplex transmit and receive operation·8 bytes of transmit/receive FIFOs (XR68C92)·16 bytes of transmit/receive FIFOs (...
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Interface Development Tools Supports 68C192 44ld PLCC, ISA Interface
Specifications | |
CH | 2 |
CPUInterface | Motorola |
Data Rate@5/3.3/2.5V | 1.0/0.5/na |
Tx/RxFIFO(Bytes) | 16/16 |
Tx/RxFIFOCtrs | No |
Tx/RxFIFOINT Trig | 4 Levels/ 4 Levels |
AutoRTS/CTS | Yes |
IrDaSup | No |
5VTolInputs | Yes |
Sup V | 2.97-5.5 |
Pkgs | PLCC-44, LQFP-44 |
The XR68C192 is a Dual Universal Asynchronous Receiver and Transmitter with 8 (XR68C92) or 16 (XR68C192)bytes of transmit and receive FIFOs. The XR68C92/192 is pin-to-pin and functionally compatible to the XR68C681and Philips SCC68681 UART with additional features. The operating speed of the receiver and transmitter can beselectedindependently from a table of twenty four fixed baud rates, a 16X clock derived fromaprogrammablecounter/ timer, or an external 1X or 16X clock. The baud rate generator and counter/timer canoperate directly from a crystalor from external clock input. The XR68C92/192 provides a power down mode inwhich the oscillator is stopped butthe register contents are retained. The XR68C92/192 is fabricated in an advanced CMOSprocess to achieve low powerand high speed requirements.