Specifications Specifications CH 1 CPUInterface Intel or Motorola DataRate(s) 8 Mbps Tx/RxFIFO(Bytes) 64 Tx/RxFIFOCtrs Yes Tx/RxFIFOINT Trig Program/ Program AutoRTS/CTS No IrDaSup No 5VTolInputs Yes Sup V 3.3, 5 Pkgs QFN-40Description The XR19L400...
XR19L400: Specifications Specifications CH 1 CPUInterface Intel or Motorola DataRate(s) 8 Mbps Tx/RxFIFO(Bytes) 64 Tx/RxFIFOCtrs Yes Tx/RxFIFOINT Trig Program/ Program AutoRTS/...
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Interface Development Tools Supports L200 32 pin QFN, ISA Interface
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Interface Development Tools Supports L200 32 pin QFN, PCI Interface
Specifications | |
CH | 1 |
CPUInterface | Intel or Motorola |
DataRate(s) | 8 Mbps |
Tx/RxFIFO(Bytes) | 64 |
Tx/RxFIFOCtrs | Yes |
Tx/RxFIFOINT Trig | Program/ Program |
AutoRTS/CTS | No |
IrDaSup | No |
5VTolInputs | Yes |
Sup V | 3.3, 5 |
Pkgs | QFN-40 |
The XR19L400 (L400) is a highly integrated device that combines a full-featured single channel Universal Asynchronous Receiver and Transmitter (UART) and RS-485 transceivers. The L400 is designed to operate with a 3.3V to 5V power supply. The L400 is fully compliant with RS-485 Standards.
The XR19L400 operates in four different modes: Active, Partial Sleep, Full Sleep and Power-Save. Each mode can be invoked via hardware or software. Upon power-up, the L400 is in the Active mode where the UART and RS-485 transceiver function normally. In the Partial Sleep mode, the internal crystal oscillator of the UART or charge pump of the RS-485 transceiver is turned off. In Full Sleep mode, both the crystal oscillator and the charge pump are turned off. While the UART is in the Sleep mode, the Power-Save mode isolates the core logic from the control signals (chip select, read/write strobes, address and data bus lines) to minimize the power consumption. The RS-485 receivers remain active in any of these four modes.