Specifications Specifications CH 2 CPUInterface Intel or Motorola Data Rate@5/3.3/2.5V na/16/12.5 Tx/RxFIFO(Bytes) 16/16 Tx/RxFIFOCtrs No Tx/RxFIFOINT Trig 4 Levels/ 4 Levels AutoRTS/CTS Yes IrDaSup Yes 5VTolInputs No Sup V 1.62-3.63 Pkgs TQFP-48, Q...
XR16M2551: Specifications Specifications CH 2 CPUInterface Intel or Motorola Data Rate@5/3.3/2.5V na/16/12.5 Tx/RxFIFO(Bytes) 16/16 Tx/RxFIFOCtrs No Tx/RxFIFOINT Trig 4 Levels/ 4 L...
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Specifications | |
CH | 2 |
CPUInterface | Intel or Motorola |
Data Rate@5/3.3/2.5V | na/16/12.5 |
Tx/RxFIFO(Bytes) | 16/16 |
Tx/RxFIFOCtrs | No |
Tx/RxFIFOINT Trig | 4 Levels/ 4 Levels |
AutoRTS/CTS | Yes |
IrDaSup | Yes |
5VTolInputs | No |
Sup V | 1.62-3.63 |
Pkgs | TQFP-48, QFN-32 |
Specifications | |
CH | 2 |
CPUInterface | Intel or Motorola |
Data Rate@5/3.3/2.5V | na/16/12.5 |
Tx/RxFIFO(Bytes) | 16/16 |
Tx/RxFIFOCtrs | No |
Tx/RxFIFOINT Trig | 4 Levels/ 4 Levels |
AutoRTS/CTS | Yes |
IrDaSup | Yes |
5VTolInputs | No |
Sup V | 1.62-3.63 |
Pkgs | TQFP-48, QFN-32 |
The XR16M25511 (M2551) is a high performance dual universal asynchronous receiver and transmitter (UART) with 16 byte TX and RX FIFOs. The device operates from 1.62 to 3.63 volts and is pin-to-pin compatible to the XR16L2551 and XR16V2551. The M2551 includes 2 additional capabilities over the XR16M2550: Intel and Motorola data bus selection and a "PowerSave" mode to minimize the sleep current. It supports Exar's enhanced features of selectable FIFO trigger level, automatic hardware (RTS/CTS) and software flow control, and a complete modem interface. An internal loopback capability allows system diagnostics. Independent programmable fractional baud rate generators are provided in each channel to select data rates up to 16 Mbps at 3.3 Volt and 4X sampling clock. The M2551 is available in 48-pin TQFP and 32-pin QFN packages.
NOTE: 1Covered by U.S. Patent #5,649,122For UART technical support or to obtain an IBIS model for this product, please email Exar's UART Technical Support group.