XCV2000E-7FGG680C

The XCV2000E-7FGG680C is designed as one member of the virtex-E family which is field programmable gate array. The Virtex-E family offers up to 43,200 logic cells in devices up to 30% faster than the virtex family. The virtex-E FPGA family delivers high-performance, high-capacity programmable logic solutions. Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 6-layer metal 0.18 mm CMOS process. These advances make Virtex-E FPGAs powerful and flexible alternatives to mask-programmed gate arrays. Virtex-E devices have up to 640 Kb of faster (250 MHz) block SelectRAM, but the individual RAMs are the same size and structure as in the Virtex family. They also have eight DLLs instead of the four in Virtex devices. Each individual DLL is slightly improved with easier clock mirroring and 4x frequency multiplication.

The XCV2000E-7FGG680C has twelve features. (1) Fast, high-density 1.8V FPGA family which means densities from 58k to 4M system gates, 130MHz internal performance (four LUT levels), designed for low-power operation and PCI compliant 3.3 V, 32/64-bit, 33/ 66-MHz. (2) Highly flexible selectI/O+ technology. (3) Differential signalling support. (4) Proprietary high-performance selectLink technology. (5) Sophisticated selectRAM+  memory hierarchy. (6) High-performance built-in clock management circuitry. (7) Flexible architecture balances speed and density. (8) Supported by xilinx foundation and alliance series development systems. (9) SRAM-based in-system configuration which means unlimited re-programmability. (10) Advanced packaging options. (11) 0.18mm 6-layer metal process. (12) 100% factory tested. That are all the main features.

Some specifications of the XCV2000E-7FGG680C  have been concluded into several points as follow. (1) Its system gates would be 2,541,952. (2) Its logic gates would be 518,400. (3) Its CLB array would be 80 x 90. (4) Its logic cells would be 43,200. (5) Its differential I/O pairs would be 344. (6) Its user I/O would be 804. (7) Its blockRAM bits would be 655,360. (8) Its distributed RAM bits would be 614,400. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!